In the board description for the ArtyS7, it's written to have a 12 MHz system clock at pin F14. That's not correct.
Schematic revision E.1 for ArtyS7 is showing IC2 is open => no clock at all
IC2 is - if soldered - a 100 MHz clock => ASEM1-100.000MHZ-LC-T
As also discovered by the author of the board description, 12 MHz is a useless clock for 7-series FPGA,s because it's to slow for clock modifying blocks (PLL, MMCM, ...)
The trace 12MHz/UCLK has a R0, but no source in schematics (incomplete schematics or an open trace ...)
As a summary: the ArtyS7 board has officially no system clock, only DDR3 reference clock can be used.
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Patrick Lehmann
In the board description for the ArtyS7, it's written to have a 12 MHz system clock at pin F14. That's not correct.
As a summary: the ArtyS7 board has officially no system clock, only DDR3 reference clock can be used.
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