JTAG-HS2 with NexysA7

[gregm102]

Just received a jtag-hs2 to use with a nexysA7-100T board.  Building the pulp risk CPU and failing to connect via openocd.   I have a different brand cable that does work, so I know my design is basically correct.  Using the -d3 flag on the openocd command line indicates that a timeout is occurring periodically with the following messages.  the message below indicates a failure scanning hart52 - the design has 1024 harts and it will fail at a random number.  As I mentioned it works fine with a different cable  Is my HS2 defective or does it need to be re-flashed?   (at signed replaced with AT)

Debug: 854 425 riscv-013.c:404 scan():  hartsello=51 dmactive -> 
Debug: 855 426 riscv-013.c:393 scan(): 41b 5i - 00000000 AT10 -> + 00330001 AT10
Debug: 856 426 riscv-013.c:404 scan():  ->  hartsello=51 dmactive
Debug: 857 427 riscv-013.c:393 scan(): 41b 5i r 00000000 AT 11 -> + 00000000 AT 10
Debug: 858 428 riscv-013.c:393 scan(): 41b 5i - 00000000 AT 11 -> + 00003082 AT 11
Debug: 859 428 riscv-013.c:404 scan():  ->  allunavail anyunavail authenticated version=2
Debug: 860 429 riscv-013.c:393 scan(): 41b 5i r 00000000  AT 10 -> + 00000000 AT 11
Debug: 861 430 riscv-013.c:393 scan(): 41b 5i - 00000000 AT 10 -> + 00330001 AT 10
Debug: 862 430 riscv-013.c:404 scan():  ->  hartsello=51 dmactive
Debug: 863 431 riscv-013.c:393 scan(): 41b 5i w 00340001 AT 10 -> + 00000000 AT 10
Debug: 864 431 riscv-013.c:404 scan():  hartsello=52 dmactive -> 
Debug: 865 433 riscv-013.c:393 scan(): 41b 5i - 00000000 AT 10 -> + 00340001 AT 10
Debug: 866 433 riscv-013.c:404 scan():  ->  hartsello=52 dmactive
Debug: 867 434 riscv-013.c:393 scan(): 41b 5i r 00000000 AT 11 -> + 00000000 AT 10
Error: 868 437 mpsse.c:938 mpsse_flush(): ftdi device did not return all data: 0, expected 6
Debug: 869 437 mpsse.c:429 mpsse_purge(): -
Error: 870 440 ftdi.c:720 ftdi_execute_queue(): error while flushing MPSSE queue: -4
Error: 871 440 riscv-013.c:550 dmi_scan(): dmi_scan failed jtag scan