I had read the spec from https://reference.digilentinc.com/_media/nexys4-ddr/nexys4ddr_rm.pdf , under 4.2 Quad-SPI Flash, stated An Artix-7 100T configuration file requires just less than four MiB (mebibyte) of memory, leaving about 77% of the flash device available for user data. My question arise when after configured the FPGA, i was desire to access the flash memory to store or load some data other than the configuration bitstream, is it possible to done with the existing Quad SPI by Xilinx? or i need to develop my own SPI controller, but the existing Quad SPI already occupied the pin for flash memory, so how can it be done?
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weipau
Hi all,
I had read the spec from https://reference.digilentinc.com/_media/nexys4-ddr/nexys4ddr_rm.pdf , under 4.2 Quad-SPI Flash, stated An Artix-7 100T configuration file requires just less than four MiB (mebibyte) of memory, leaving about 77% of the flash device available for user data. My question arise when after configured the FPGA, i was desire to access the flash memory to store or load some data other than the configuration bitstream, is it possible to done with the existing Quad SPI by Xilinx? or i need to develop my own SPI controller, but the existing Quad SPI already occupied the pin for flash memory, so how can it be done?
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