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Microblaze Reference design for the arty7-100


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Hi

Could someone point me to a reference design which uses a microblaze, ddr3, flash on the ARTY 7-100 board. I see such designs for the ARTY 7-35 board in Vivado 2015.1 but I have the 100 board.

I took the gpio design (which has a microblaze, flash, ddr) for the arty7-35 board and I get a bit file.

I then went and changed the board to arty7-100 and I get errors on the qspi_flash_sck

[DRC UCIO-1] Unconstrained Logical Port: 1 out of 23 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: qspi_flash_sck.

[DRC NSTD-1] Unspecified I/O Standard: 1 out of 23 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: qspi_flash_sck.

The problem is with qspi_flash_sck. Both runs were with same Vivado 2015.1.

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