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unable to program flash with ARTY Z7


Hi dear fellows,

i recently received a arty Z7 board and i'm using VITIS 2020.1 

despite several efforts and desperate internet research, i always get an error when i try to program the flash QSPI after project building 

the issue is discussed on several xilinx forum however no clear work around is provided 

if someone canhelp .....

Many thanks in advance



console text

Downloading FSBL...
Running FSBL...
Finished running FSBL.
===== mrd->addr=0xF8000110, data=0x000FA220 =====
READ: ARM_PLL_CFG (0xF8000110) = 0x000FA220
===== mrd->addr=0xF8000100, data=0x00028008 =====
READ: ARM_PLL_CTRL (0xF8000100) = 0x00028008
===== mrd->addr=0xF8000120, data=0x1F000200 =====
READ: ARM_CLK_CTRL (0xF8000120) = 0x1F000200
===== mrd->addr=0xF8000118, data=0x001452C0 =====
READ: IO_PLL_CFG (0xF8000118) = 0x001452C0
===== mrd->addr=0xF8000108, data=0x0001E008 =====
READ: IO_PLL_CTRL (0xF8000108) = 0x0001E008
Info:  Remapping 256KB of on-chip-memory RAM memory to 0xFFFC0000.
===== mrd->addr=0xF8000008, data=0x00000000 =====
===== mwr->addr=0xF8000008, data=0x0000DF0D =====
MASKWRITE: addr=0xF8000008, mask=0x0000FFFF, newData=0x0000DF0D
===== mwr->addr=0xF8000910, data=0x000001FF =====
===== mrd->addr=0xF8000004, data=0x00000000 =====
===== mwr->addr=0xF8000004, data=0x0000767B =====
MASKWRITE: addr=0xF8000004, mask=0x0000FFFF, newData=0x0000767B
Problem in running uboot
Flash programming initialization failed.

ERROR: Flash Operation Failed

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2 answers to this question

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Hi @JIBI3731,

Are you using PetaLinux at all or Vitis HLS or something like that? Normally to creatte the appropriate file and program flash, you would follow these steps that are nicely outlined in this specific forum post here: https://forum.digilentinc.com/topic/5232-problem-with-how-to-store-your-sdk-project-in-spi-flash-tutorial/?do=findComment&comment=21569. These steps were written prior to the existence of Vitis, but the steps are still the same.

Let me know if you have any questions.



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i JColvin,

Many thanks for the answer, i will look at it in details

However, i changed a bit my mind and now i try to load and run "manually" a bitfile and an executable, in order to fully understand (to a certain level) the various involved stage.

i push the PORB button with boot selection jumper on JTAG , then in XSCT console : 

   fpga D:\\DEVPT\\VIVADO\\ZYNQ\\ARTY_Z7_LE_RETOUR\\design_1_wrapper.bit
   dow d:\\xilinx\\workspace\\le_retour\\debug\\le_retour.elf

i get at the end : Memory write error at 0x100000. APB Memory access port is disabled

what do i miss ?

Best regards



Herunder the logs :

xsct% targets
  1  APU
     2* ARM Cortex-A9 MPCore #0 (Running)
     3  ARM Cortex-A9 MPCore #1 (Running)
  4  xc7z020
xsct% fpga D:\\DEVPT\\VIVADO\\ZYNQ\\ARTY_Z7_LE_RETOUR\\design_1_wrapper.bit

  0%    0MB   0.0MB/s  ??:?? ETA
 25%    0MB   1.9MB/s  ??:?? ETA
 50%    1MB   1.8MB/s  ??:?? ETA
 74%    2MB   1.8MB/s  ??:?? ETA
 95%    3MB   1.7MB/s  ??:?? ETA
100%    3MB   1.8MB/s  00:02    
xsct% ps7_init
xsct% xsct% dow d:\\xilinx\\workspace\\le_retour\\debug\\le_retour.elf

Downloading Program -- D:/XILINX/workspace/LE_RETOUR/Debug/LE_RETOUR.elf
    section, .text: 0x00100000 - 0x00100a07
    section, .init: 0x00100a08 - 0x00100a13
    section, .fini: 0x00100a14 - 0x00100a1f
    section, .rodata: 0x00100a20 - 0x00100a5f
    section, .data: 0x00100a60 - 0x00100ecf
    section, .eh_frame: 0x00100ed0 - 0x00100ed3
    section, .mmu_tbl: 0x00104000 - 0x00107fff
    section, .init_array: 0x00108000 - 0x00108003
    section, .fini_array: 0x00108004 - 0x00108007
    section, .bss: 0x00108008 - 0x0010802f
    section, .heap: 0x00108030 - 0x0010a02f
    section, .stack: 0x0010a030 - 0x0010d82f

  0%    0MB   0.0MB/s  ??:?? ETA
aborting, 2 pending requests...
aborting, 1 pending requests... Memory write error at 0x100000. APB Memory access port is disabled

Failed to download D:/XILINX/workspace/LE_RETOUR/Debug/LE_RETOUR.elf
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Running (APB Memory access port is disabled)

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