I'm trying to output a custom digital waveform that is a frequency modulated bit stream. The basic scheme is as follows:
1. Preamble: frequency starts out at 10KHz for 400 cycles
After
2. for a 1 bit, send 20 13KHz cycles, followed by 20 10KHz cycles
3. for a 0 bit, send 10 6KHz cycles, followed by 20 10KHz cycles
4. Postable: frequency runs at 10KHz for 400 Cycles.
I can generate the signal with python but I seem to be running into bitstream length issue. The moment the data gets over 1024 "bits" (actual bits, not the frequency modulated ones), the signal is not generated. My code is below but it's modified to only send 1024 bits.
My second issue is that when this pattern works, it repeats. I would like it to run only once. I tried a few things found in forums but there's no documentation for the python interface.
from ctypes import *
from dwfconstants import *
import sys
import time
if sys.platform.startswith("win"):
dwf = cdll.dwf
elif sys.platform.startswith("darwin"):
dwf = cdll.LoadLibrary("/Library/Frameworks/dwf.framework/dwf")
else:
dwf = cdll.LoadLibrary("libdwf.so")
hdwf = c_int()
version = create_string_buffer(16)
dwf.FDwfGetVersion(version)
print("DWF Version: "+str(version.value))
print("Opening first device")
dwf.FDwfDeviceOpen(c_int(-1), byref(hdwf))
if hdwf.value == 0:
print("failed to open device")
szerr = create_string_buffer(512)
dwf.FDwfGetLastErrorMsg(szerr)
print(str(szerr.value))
quit()
print("Configuring Digital Out")
hzSys = c_double()
dwf.FDwfDigitalOutInternalClockInfo(hdwf, byref(hzSys))
data_one_wave = [1,1,1,0,0,0]
data_zero_wave = [1,1,1,1,1,1,0,0,0,0,0,0]
data_amble_wave = [1,1,1,1,0,0,0,0]
data_preamble = data_amble_wave * 4
data_zero_bit = (data_zero_wave * 2) + (data_amble_wave * 3)
data_one_bit = (data_one_wave * 4) + (data_amble_wave * 3)
data_postamble = data_preamble
# Message with short preamble, 07, 1000, 07, short postamble
data_to_send = data_preamble \
+ data_zero_bit + data_zero_bit + data_zero_bit + data_one_bit \
\
+ data_zero_bit + data_zero_bit + data_one_bit + data_one_bit \
+ data_one_bit + data_one_bit + data_one_bit + data_zero_bit \
+ data_one_bit + data_zero_bit + data_zero_bit + data_zero_bit \
\
+ data_zero_bit + data_zero_bit + data_zero_bit + data_one_bit \
+ data_postamble
time_to_sleep = 5
# Message with just preamble - 10KHz
# data_to_send = data_preamble
# time_to_sleep = 3
print("Sending " + str(len(data_to_send)) + " bit of data")
data_py = data_to_send
# how many bytes we need to fit this many bits, (+7)/8
rgbdata=(c_ubyte*((len(data_py)+7)>>3))(0)
# array to bits in byte array
for i in range(len(data_py)):
if data_py[i] != 0:
rgbdata[i>>3] |= 1<<(i&7)
pin=0
# generate pattern
dwf.FDwfDigitalOutEnableSet(hdwf, c_int(pin), c_int(1))
dwf.FDwfDigitalOutIdleSet(hdwf, c_int(0), DwfDigitalOutIdleHigh)
dwf.FDwfDigitalOutTypeSet(hdwf, c_int(pin), DwfDigitalOutTypeCustom)
# 80kHz sample rate
dwf.FDwfDigitalOutDividerSet(hdwf, c_int(pin), c_int(int(hzSys.value/80e3))) # set sample rate
dwf.FDwfDigitalOutDataSet(hdwf, c_int(pin), byref(rgbdata), c_int(len(data_py)))
# This doesn't seem to work.
dwf.FDwfDigitalOutRepeatSet(hdwf, c_int(1)) # repeat once
print("Generating pattern...")
dwf.FDwfDigitalOutConfigure(hdwf, c_int(1))
time.sleep(time_to_sleep)
dwf.FDwfDigitalOutReset(hdwf)
dwf.FDwfDeviceCloseAll()
If I bump any of the "multipliers on the data_preamble or similar variables to make a longer stream, the output doesn't get generated.
I'm basically using a "common denominator" clock that can handle all 3 frequencies and mapping the 1s and 0s as needed. If there's a better way to do this, I'm all ears. The only requirement is that the control of the number of cycles must be exact.
Question
rost0031
I'm trying to output a custom digital waveform that is a frequency modulated bit stream. The basic scheme is as follows:
1. Preamble: frequency starts out at 10KHz for 400 cycles
After
2. for a 1 bit, send 20 13KHz cycles, followed by 20 10KHz cycles
3. for a 0 bit, send 10 6KHz cycles, followed by 20 10KHz cycles
4. Postable: frequency runs at 10KHz for 400 Cycles.
I can generate the signal with python but I seem to be running into bitstream length issue. The moment the data gets over 1024 "bits" (actual bits, not the frequency modulated ones), the signal is not generated. My code is below but it's modified to only send 1024 bits.
My second issue is that when this pattern works, it repeats. I would like it to run only once. I tried a few things found in forums but there's no documentation for the python interface.
from ctypes import * from dwfconstants import * import sys import time if sys.platform.startswith("win"): dwf = cdll.dwf elif sys.platform.startswith("darwin"): dwf = cdll.LoadLibrary("/Library/Frameworks/dwf.framework/dwf") else: dwf = cdll.LoadLibrary("libdwf.so") hdwf = c_int() version = create_string_buffer(16) dwf.FDwfGetVersion(version) print("DWF Version: "+str(version.value)) print("Opening first device") dwf.FDwfDeviceOpen(c_int(-1), byref(hdwf)) if hdwf.value == 0: print("failed to open device") szerr = create_string_buffer(512) dwf.FDwfGetLastErrorMsg(szerr) print(str(szerr.value)) quit() print("Configuring Digital Out") hzSys = c_double() dwf.FDwfDigitalOutInternalClockInfo(hdwf, byref(hzSys)) data_one_wave = [1,1,1,0,0,0] data_zero_wave = [1,1,1,1,1,1,0,0,0,0,0,0] data_amble_wave = [1,1,1,1,0,0,0,0] data_preamble = data_amble_wave * 4 data_zero_bit = (data_zero_wave * 2) + (data_amble_wave * 3) data_one_bit = (data_one_wave * 4) + (data_amble_wave * 3) data_postamble = data_preamble # Message with short preamble, 07, 1000, 07, short postamble data_to_send = data_preamble \ + data_zero_bit + data_zero_bit + data_zero_bit + data_one_bit \ \ + data_zero_bit + data_zero_bit + data_one_bit + data_one_bit \ + data_one_bit + data_one_bit + data_one_bit + data_zero_bit \ + data_one_bit + data_zero_bit + data_zero_bit + data_zero_bit \ \ + data_zero_bit + data_zero_bit + data_zero_bit + data_one_bit \ + data_postamble time_to_sleep = 5 # Message with just preamble - 10KHz # data_to_send = data_preamble # time_to_sleep = 3 print("Sending " + str(len(data_to_send)) + " bit of data") data_py = data_to_send # how many bytes we need to fit this many bits, (+7)/8 rgbdata=(c_ubyte*((len(data_py)+7)>>3))(0) # array to bits in byte array for i in range(len(data_py)): if data_py[i] != 0: rgbdata[i>>3] |= 1<<(i&7) pin=0 # generate pattern dwf.FDwfDigitalOutEnableSet(hdwf, c_int(pin), c_int(1)) dwf.FDwfDigitalOutIdleSet(hdwf, c_int(0), DwfDigitalOutIdleHigh) dwf.FDwfDigitalOutTypeSet(hdwf, c_int(pin), DwfDigitalOutTypeCustom) # 80kHz sample rate dwf.FDwfDigitalOutDividerSet(hdwf, c_int(pin), c_int(int(hzSys.value/80e3))) # set sample rate dwf.FDwfDigitalOutDataSet(hdwf, c_int(pin), byref(rgbdata), c_int(len(data_py))) # This doesn't seem to work. dwf.FDwfDigitalOutRepeatSet(hdwf, c_int(1)) # repeat once print("Generating pattern...") dwf.FDwfDigitalOutConfigure(hdwf, c_int(1)) time.sleep(time_to_sleep) dwf.FDwfDigitalOutReset(hdwf) dwf.FDwfDeviceCloseAll()
If I bump any of the "multipliers on the data_preamble or similar variables to make a longer stream, the output doesn't get generated.
I'm basically using a "common denominator" clock that can handle all 3 frequencies and mapping the 1s and 0s as needed. If there's a better way to do this, I'm all ears. The only requirement is that the control of the number of cycles must be exact.
Can you help?
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