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Synthesis/implementation time Vivado 2020 with Kintex-7


dmeads_10

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Hi all! 

I am thinking of purchasing a genesys 2 Board which has a kintex-7 part on it. I have 3 FPGA boards (started with a small lattice board, then a medium altera board, then got a new laptop and a zynq board) and want to move up significantly from the Arty z-7 (which is still a great board) for some of my projects.

The problem is, Im wondering if some FPGAs are too much for some computers with not enough resources? specifically Im worried about synthesis and implementation time. 

If you put the same design on different sized chips, does the larger chip take longer to synthesize in vivado? Obviously larger designs take longer, but I dont want to buy the board if it is going to be to much for my computer. 

My current system is running vivado/vitis 2020.1 with dual core i5 and 8 gb DDR4 (laptop from 2017). Not the fastest laptop but it works really well even for the arty z-7010 board. I made a design last nigh which used half the BRAM on the chip and about 1/3 of the PL resources (took about 7 min to synth and implement which I dont consider slow at all).

would my system be okay with the genesys 2 board? if it takes a long time its okay I can be patient, I just dont want it to time out or take a half hour to synthesize a few LUTs.

thanks,

-Dom

p.s. Im adding this question to the xilinx forums too and will repost the answer here if i get one.

 

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1 hour ago, dmeads_10 said:

The problem is, Im wondering if some FPGAs are too much for some computers with not enough resources? specifically Im worried about synthesis and implementation time. 

What do you think of as too much time for the tools to create a configuration file? I have a Genesys2 and have never had an issue with any version of Vivado ( I don't use Vivado 2019.2 or later ). There are a lot of factors that decide how long the synthesis and P&R need to work. Most of it revolved around meeting, or more accurately trying to meet, timing constraints. If you have a design with a lot of clock domains tied to IO and use a lot of block memory it can take an unusual amount of time. In the old days very large FPGA devices might have taken more than 45 minutes for this process. This didn't mean that we couldn't do our work, just that we needed to be smart about how we did it. If you are doing all HDL designs then writing testbench code and verification is really the big time consumer.

I've been working recently with the latest version of Quartus on a design that uses 4 lanes of Gen2 PCIe transceivers, external DDR, a number of 64 KB BRAM buffers and 1 GbE Ethernet, not to mention a lot of FIFOs and miscellaneous logic. It takes well over 20 minutes to spin a configuration file even though I'm using about 20% of the device resources. This design has a LOT of source files making up the basic functionality. Almost everything runs at 125 MHz or higher. Obviously I don't try and generate a sof file just to see it the design works or every time I think of another feature that I want to implement. I;ve had simulations that lasted a lot longer to run. My WIN10 development PC has 32 GB memory and last year's higher end Intel processor so it's no slouch. ( Well, I'd qualify that by saying that the latest version of Windows has always been able to make the latest hardware seem slow...)

There is no good answer to this question because it's completely subjective. Just because your PC is busy working on one task doesn't mean that you can't be productive doing something else at the same time. That's howwo I see it.

As for the Genesys2 I don't know of a better, or even similar,  Kintex based board for the price. It's a step up form the biggest Artix based device in a lot of ways. But of course you should only spend the money on something if there is a good justification for doing so. There are a lot of nifty things that you can do with a Genesys2.

Vivado isn't going to take much longer to do timing analysis, synthesize, place and route a design on a larger Kintex than it would on a smaller Artix like the Nexys Video has. In fact you might be able to do some things more quickly by taking advantage of the Kintex's superior capabilities.

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gotcha, thanks for the thorough answer. 

Yes okay, sounds like it would work. I havent spent any time with larger scale FPGAs, and I was just concerned that it would take like 1 or 2 hours to synthesize and implement a design. Sounds like it wont unless its reeally big. and yes I use up the synthesis time to do other things as you mentioned like answer emails and do calculations. 

Thanks for the advice :)

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The KC325T in the Genesys2 is spacious for this class of FPGA board but not terribly huge. There are some monster devices out there that cost more than most peoples' cars. For most 'home' projects you will have a hard time using most of the resources. BTW, the Genesys2 borrows a lot from the Xilinx KC705 board with 2 FMC connectors. The 2nd KC705 that I bought developed an inability to be configured that I couldn't figure out after a year and became worthless. The KC705 does have 8 lanes of PCIe going for it.

For the ancients among us doing other chores while waiting for things to get done was par for the course. The very first board design that I did involved having a guy come and tape out a multi-layer PCB design. Yes, that involved very large pieces of velum and lots of black tape of various widths all hand positioned. Hard to picture... am I right? Ah, the bad old days...

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