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lucas.ritter

Arty Board with Vivado HLS

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Hello I am having difficulty finding the board files for the ARTY board that my partner and I are trying to use. I was able to load them into Vivado, but have not been able to do the same for Vivado HLS. 

 

Help would be greatly appreciated so i can at least start working with the board i have instead of the examples that come loaded. I am using the 2016.1 version of the design suiite. 

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Hi lucas.ritter,

Unfortunately Vivado HLS handles 'board files' a little differently. In fact, the equivalent to board files in HLS is an xml file found in the C:/Xilinx/Vivado_HLS/201x.x/common/config folder called VivadoHls_boards.xml. You could possibly edit this file to include information for the Arty. The board files package includes some other things like .prj files for the mig, but I don't think that these are necessary for HLS as the program exists more as a method for you to create your own IP cores using C language than a platform for you to put together a system for configuring your Arty.

If you decide to edit this file, I advise that you make a backup copy just in case something happens as a result of your tinkering.

I hope this information is of use to you!
Andrew

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Hi @chainastole,

Re-reading through this thread and the Xilinx thread, you likely do not need the board files as they exist for "normal" Vivado, because as @AndrewHolzer mentioned

On 5/11/2016 at 3:49 PM, AndrewHolzer said:

The board files package includes some other things like .prj files for the mig, but I don't think that these are necessary for HLS as the program exists more as a method for you to create your own IP cores using C language than a platform for you to put together a system for configuring your Arty.

My understanding with HLS is that you would be able to create all of your needed IPs in C or C++ rather than in HDL or through pre-made IP cores, so the purpose of creating a Digilent board entry in the VivadoHls_boards.xml is to ensure the correct FPGA (or SoC) is being targeted while creating your design. The rest of the board files add other conveniences (such as per-configuring the design for the on-board DDR memory) but that is a not a required component.

Thanks,
JColvin

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I haven't used Vivado HLS (outside of SDSoC that is), but if the board files cannot be detected by the tool, then you can probably just create a project that targets the FPGA found on the arty instead. The part you would want to select is:  xc7a35ticsg324-1L

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On 5/11/2016 at 6:49 PM, AndrewHolzer said:

Hi lucas.ritter,

Unfortunately Vivado HLS handles 'board files' a little differently. In fact, the equivalent to board files in HLS is an xml file found in the C:/Xilinx/Vivado_HLS/201x.x/common/config folder called VivadoHls_boards.xml. You could possibly edit this file to include information for the Arty. The board files package includes some other things like .prj files for the mig, but I don't think that these are necessary for HLS as the program exists more as a method for you to create your own IP cores using C language than a platform for you to put together a system for configuring your Arty.

If you decide to edit this file, I advise that you make a backup copy just in case something happens as a result of your tinkering.

I hope this information is of use to you!
Andrew

Hi Andrew,

Do you know what information I need to add to .xml file for Arty Z7 board? I am using Vivado 2017.4

Thx,

Edited by reza20

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Hi @reza20,

We do not have board files for Vivado HLS. Here is a forum thread that discusses board files with vivado HLS. We do have board files for Vivado HLx . Here is a tutorial for the board files with Vivado HLx.

thank you,

Jon 

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On 7/23/2018 at 9:25 PM, jpeyron said:

Hi @reza20,

We do not have board files for Vivado HLS. Here is a forum thread that discusses board files with vivado HLS. We do have board files for Vivado HLx . Here is a tutorial for the board files with Vivado HLx.

thank you,

Jon 

I am trying to complete the Vivado HLS lab written for Digilent ZedBoard, while possessing Digilent Arty-Z7020 and working with Vivado 2019.1 WebPack. As is the problem described by original author I don’t see the board in Vivado HLS “Device Selection Dialog”.

I understood, there are no pre-built board files for Vivado HLS for Arty (BTW this is solved for ZedBoard). I understood, two methods are proposed for device entry: a) add the board file manually into Vivadohls_board.xml b) not bother with board but rather add the device as part. I have obstacles in implementing both of them and they are:

1.      I can’t find Vivadohls_board.xml file nowhere under <myInstallation>/Xilinx.

2.      The Arty-Z7020 Part is XC7Z020-1CLG400C, while the Vivado HLS device selector has xc7z020clg400-{1,2,3} and xc7z020iclg400-1L. I don’t know what is the match. May be it is not significant.

The thread is duplicated in corresponding thread at https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/Zybo-Board-Files-for-HLS/td-p/748198?_ga=2.15438006.1459192437.1572601526-1038653147.1561740217

Edited by chainastole

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Hi @chainastole,

Where are you seeing this Vivado HLS lab that was created for the Zedboard? I can say that I am not aware of a Digilent-made tutorial and can confirm that we do not have any pre-built board files for Vivado HLS.

As per the Xilinx thread that both you and jpeyron linked to, you can make the Arty board visible during the board selection screen in Vivado HLS, but as there are no board level constraints it will not be of any real use.

Thanks,
JColvin

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On 11/6/2019 at 6:24 PM, JColvin said:

Hi @chainastole,

Where are you seeing this Vivado HLS lab that was created for the Zedboard? I can say that I am not aware of a Digilent-made tutorial and can confirm that we do not have any pre-built board files for Vivado HLS.

As per the Xilinx thread that both you and jpeyron linked to, you can make the Arty board visible during the board selection screen in Vivado HLS, but as there are no board level constraints it will not be of any real use.

Thanks,
JColvin

Hi, @JColvin

  1. The lab I am talking about is http://www.zynqbook.com/buy.php. It is not a Digilent tutorial. It is written by a collective of authors from University of Strathclyde. It was very convenient for me as a newbie in FPGA.
  2.  @hbucher at https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/Installing-Digilent-Board-on-Vivado/td-p/817812 states that "... in Vivado HLS you don't need the board file because it only uses the device part". If it is really so, I'll definitely go this direction. The only thing is I don't understand why " .. you don't need the board file ...". All the projects from aforementioned tutorial I'd completed until now according to RTL entry flow and involving board buttons and LEDs do needed the board awareness expressed in board constraint or board master files. Will be glad to receive an explanation.
  3. As for my second question I do detected now that my Arty Z7-20 part number is xc7z020clg400-1. It can be seen in "Project Summary" in one of my previously performed labs.
Edited by chainastole

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