Im having issues getting one of our Zybos to boot. Ive tried building and running the Hello World program using Xilinx design tools 2020.1, 2019.2 and 2018.2.
Something seems to go wrong in the OKToRun label, specifically at the line in boot.S commented: "/* read diagnostic register */" , the program counter jumps to 0.
Jump to 0 in boot.S
#ifdef CONFIG_ARM_ERRATA_743622
teq r5,#0x00200000 /* only present in r2p* */
mrceq p15,0, r10, c15, c0,1/* read diagnostic register */<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
orreq r10, r10,#1 << 6 /* set bit #6 */
mcreq p15,0, r10, c15, c0,1/* write diagnostic register */#endif
Jump to 0 in disassembly
OKToRun:0010017c: mrc p15,0, r0, c0, c0
221 and r5, r0,#0x00f0000000100180: and r5, r0,#15728640...232#ifdef CONFIG_ARM_ERRATA_743622
00100198: mcrle p15,0, r10, c15, c0,1233 teq r5,#0x00200000 /* only present in r2p* */0010019c: teq r5,#2097152234 mrceq p15,0, r10, c15, c0,1/* read diagnostic register */001001a0:.word 0xff1faf30<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<235 orreq r10, r10,#1 << 6 /* set bit #6 */001001a4: orreq r10, r10,#64236 mcreq p15,0, r10, c15, c0,1/* write diagnostic register */237#endif238239/* set VBAR to the _vector_table address in linker script */001001a8: mcreq p15,0, r10, c15, c0,1...
Using 2018.2, this is what I'm doing and seeing:
in Vivado:
1) New project, selecting the installed Zybo z7-20 board, all other option default.
2) Create Block Diagram.
3) Add PS
4) Connect M_AXI_GP0_ACLK to FCLK_CLK0
5) Create HDL wrapper for the bd file, let Vivado manage this
6) Generate bitstream
7) Export hardware
Launch SDK
In SDK:
1) Create new application project, standalone domain, core0, c language, Hello World example
2) Builds no problem.
3) Debug configuration - check "Stop at program entry"
4) Start the debugger
5) Instruction stepping mode:
Question
Kyle Hagen
Hello everyone,
Im having issues getting one of our Zybos to boot. Ive tried building and running the Hello World program using Xilinx design tools 2020.1, 2019.2 and 2018.2.
Something seems to go wrong in the OKToRun label, specifically at the line in boot.S commented: "/* read diagnostic register */" , the program counter jumps to 0.
Jump to 0 in boot.S
Jump to 0 in disassembly
Using 2018.2, this is what I'm doing and seeing:
in Vivado:
1) New project, selecting the installed Zybo z7-20 board, all other option default.
2) Create Block Diagram.
3) Add PS
4) Connect M_AXI_GP0_ACLK to FCLK_CLK0
5) Create HDL wrapper for the bd file, let Vivado manage this
6) Generate bitstream
7) Export hardware
Launch SDK
In SDK:
1) Create new application project, standalone domain, core0, c language, Hello World example
2) Builds no problem.
3) Debug configuration - check "Stop at program entry"
4) Start the debugger
5) Instruction stepping mode:
00100000: b +292 ; addr=0x0010012c: _prestart
_prestart:
0010012c: mrc p15, 0, r1, c0, c0, 5
00100130: and r1, r1, #15
00100134: cmp r1, #0
00100138: beq +4 ; addr=0x00100144: CheckEFUSE
CheckEFUSE:
00100144: ldr r0, [pc, #+764]
00100148: ldr r1, [r0]
0010014c: ands r1, r1, #128
00100150: beq +36 ; addr=0x0010017c: OKToRun
OKToRun:
0010017c: mrc p15, 0, r0, c0, c0
00100180: and r5, r0, #15728640
00100184: and r6, r0, #15
225 #ifdef CONFIG_ARM_ERRATA_742230
00100188: orr r6, r6, r5, lsr #16
0010018c: cmp r6, #34
00100190: mrcle p15, 0, r10, c15, c0, 1
00100194: orrle r10, r10, #16
232 #ifdef CONFIG_ARM_ERRATA_743622
00100198: mcrle p15, 0, r10, c15, c0, 1
0010019c: teq r5, #2097152
001001a0: .word 0xff1faf30 <<<<<<<<<<<<<<<<<<<<<< Stepping into this causes the program counter to go to address 00000004
00000004: andeq r0, r0, r0
00000008: andeq r0, r0, r0
0000000c: andeq r0, r0, r0
00000010: andeq r0, r0, r0
etc...
0002fffc: andeq r0, r0, r0
0000000c: andeq r0, r0, r0
00000010: andeq r0, r0, r0
00000014: andeq r0, r0, r0
etc...
Can anyone help me understand why the PC is jumping to 0 and what might be wrong here? Any help is greatly appreciated.
Thanks in advance,
Kyle
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