We used Vivado to generate a bitstream and download it to NetFPGA1G-CML. The top module contain 9 fully pipelined small circuits connected in series, then IN/OUTPUTs are connected to the PMOD. First of all, we opened each circuits separately and worked normally (about 21W or so).
Later, when the two circuits were turned on, it was found that it did not work normally (about 25W).After restarting, each circuits was tested separately and it was still operating normally, so design seem no problem. Ideally, 9 small circuits should operate at the same time, But when we tested it, two small circuits would make the FPGA not work properly.
Our architecture, using 12V power supply:
We will observe the power supply by adding a wattage measuring machine.
We measure coreV (schematic of this board). Then use an oscilloscope to observe the voltage across the capacitor in parallel with coreV. We found that the fpga core voltage dropped sharply, causing the internal function to fail to operate normally (the original 1V dropped to 0.6V)
The wattage was about 24W at that time. Is such an IR drop too big?Do you know how to solve this issue?
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Paul Chang
Dear Sir,
We used Vivado to generate a bitstream and download it to NetFPGA1G-CML. The top module contain 9 fully pipelined small circuits connected in series, then IN/OUTPUTs are connected to the PMOD. First of all, we opened each circuits separately and worked normally (about 21W or so).
Later, when the two circuits were turned on, it was found that it did not work normally (about 25W).After restarting, each circuits was tested separately and it was still operating normally, so design seem no problem. Ideally, 9 small circuits should operate at the same time, But when we tested it, two small circuits would make the FPGA not work properly.
Our architecture, using 12V power supply:
We will observe the power supply by adding a wattage measuring machine.
We measure coreV (schematic of this board![]()
). Then use an oscilloscope to observe the voltage across the capacitor in parallel with coreV. We found that the fpga core voltage dropped sharply, causing the internal function to fail to operate normally (the original 1V dropped to 0.6V)
The wattage was about 24W at that time. Is such an IR drop too big?Do you know how to solve this issue?
Our XDC file:
set_property PACKAGE_PIN AA3 [get_ports clk_250_p] set_property PACKAGE_PIN AA2 [get_ports clk_250_n] set_property PACKAGE_PIN E23 [get_ports BBB_SCKO] set_property PACKAGE_PIN D19 [get_ports BBB_SCKI] set_property PACKAGE_PIN D25 [get_ports BBB_SDI] set_property PACKAGE_PIN F23 [get_ports BBB_SDO] set_property PACKAGE_PIN AA8 [get_ports RST_N] set_property IOSTANDARD LVCMOS33 [get_ports BBB_SCKI] set_property IOSTANDARD LVCMOS33 [get_ports BBB_SCKO] set_property IOSTANDARD LVCMOS33 [get_ports BBB_SDI] set_property IOSTANDARD LVCMOS33 [get_ports BBB_SDO] set_property IOSTANDARD LVDS [get_ports clk_250_p] set_property IOSTANDARD LVDS [get_ports clk_250_n] set_property IOSTANDARD LVCMOS18 [get_ports RST_N]Best Regards,
Paul
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