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FPGA supports 1.8V Standatd for PMOD


Zzingoh

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Hi,

I have Basys 3 for SPI slave and it supports 3.3 PMOD IO but I have 1.8V SPI Master So I need to have a way to use 1.8V PMOD. I went through the forum and found the level shifter at https://store.digilentinc.com/pmod-lvlshft-logic-level-shifter/  but I need bi-directional level shiter. So I am trying to find out the FPGA board can support 1.8V PMOD. Would you please recommend it?

Currently I am seeing Nexys Video has SET_VADJ that can support 1.8V. Can someone please confirm it can support 1.8V PMOD IO? If yes then would you please let me know how to program SET_VADJ to 1.8V?

Thank you

Tommy

 

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Hi @Zzingoh,

This was addressed a bit in the other thread you commented on, but generally speaking you will not be able to set the Pmod ports on the Nexys Video to a 1.8V standard as the voltage rails on the Pmod ports themselves are hardwired to 3.3V and the banks that the individual Pmod I/O lines are present on have other connections that are dependent on the 3.3V (such as HDMI or the QSPI connectivity).

The Set_VADJ does not affect any Pmod I/O directly, only the FMC mezzanine connector, user push-buttons, switches, and XADC Pmod connector. As noted in the other thread you can connect different modules to the FMC connector that can provide general access to the I/O channels, but Digilent doesn't have any modules specifically for this purpose. Alternate boards that more readily support 1.8V may be a better option for your situation.

Let me know if you have any questions about this.

Thanks,
JColvin

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Hi

 

After reading an article and answers from the other thread, I have bought the Nexsys Video and am trying to use XJADC for 1.8V.

According to Nesys Video reference manual below, I need to program VADJ_EN low and SET_VADJ with 01 and then VADJ_EN high

"An FPGA design can dynamically change the VADJ voltage to suit a certain FMC mezzanine card or application. Care must be taken to disable the regulator first by bringing “VADJ_EN” low, setting “SET_VADJ(1:0)” and enabling the regulator again. Please note that for proper voltage levels in digital signals connected to VADJ-powered FPGA banks (ex. user push-buttons), the correct I/O standard still needs to be set in the design user constraints (XDC or UCF file). See the schematic and/or the constraints file to determine which signals are in VADJ-powered banks. The provided master UCF and XDC files assume the default VADJ voltage of 1.2V, declaring LVCMOS12 as the I/O standard for these signals.

SET_VADJ(1:0)VADJ

00 (default)1.2 V

01 1.8 V

10 2.5 V

11 3.3 V

Table 2. VADJ programmable voltages"

 

Could you please let me know any example of using VADJ_EN and SET_VADJ ?

I think there are some demands from customers to use 1.8V so if you have an example about how to use those register then it will help us a lot.

 

Thanks

Tommy

 

 

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Going through FMC just for 1.8 V IO seems a bit like overkill (depends ultimately on your application).

But you may find boards better suited to the application. One such board is Trenz TE0725. You can provide the bank voltages through pins on the header, solder a wire to the on-board 1.8 V regulator (a bit of a hack but easily done, it has a large capacitor where you can take the voltage from).

To emulate a PMOD port you may use two insulation-displacement connectors and a SCSI-style ribbon cable. Separate individual wires on one end and push them into connector blades according to the desired pinout. Again, it's a hack but a fairly clean one (I actually prefer this over soldering). Doing the first hack correctly also gives you 1.8 V supply as one of the pins on the connector.

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Thank you for your response. 

 

I have migrated my RTL design from Basys 3 to Nexys Video and have verified it works well with PMOD JA port but not working at all with JXADC port. All transaction are 0. No data.

Do we have any example to use JXADC with VADJ?

I am suspecting I need to set SET_VADJ[0] and SET_VADJ[1] with some value and also enable VADJ_EN.

 

Please advice if you have any example to enable JXADC.

 

Thanks,

Tommy

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