Zedboard REV E

[NEP]

I have existing supply of ZEDBOARDS REV D. I recently purchased four Zedboard (REV E boards). I am running into issues with REV E that produce a different result compared to REV D.

Here are the details:

- Vivado 2018.2 project with Zedboard selected as Board.

- Simple ZYNQ processing system added. (see design_1.tcl exported from Vivado using File > Export > Export Block Design).

- Hardware Exported and SDK Launched.

- Test Application Projects on Xilinx SDK created. One Application project based on Hello World Template and the other one based on Memory Test Template. NO CHANGES are made to the file. 

- Applications are downloaded via USB-JTAG port and run on REV D board (my old boards - I have 8 of these). Board is powered off. Swapped with new REV E boards (the new boards I purchased last week from Digilent). Application is run again. 

1) HELLO WORLD doesn't produce any output on terminal (REV E boards)

I have verified that the Vivado 2018.2 project and its SDK counterpart work on ALL of my REV D boards. However, the simple Hello World DOES not provide any output on terminal for ALL of the four ZEDBOARDS bought last week (REV E boards). So I know it is not the JTAG progamming header issue or the USB-to-UART driver issue. What is different in REV E vs REV D? 

 

2) For"Memory Tests" template. Both REVD board and REVE boards produce messages.
HOWEVER, there is a difference:

uart3.log is created from REV E board. (says all Testing memory region: ps7_ddr_0 FAILED)

uart3REVD.log is creaed from REV D board. (no change in design or application - all Testing memory region including ps7_ddr_0 PASSED).

 

Thank you for any help or pointers.

uart3.log uart3REVD.log design_1.tcl

[yunus]

I have the same problems as "NEP". 

 

Quote

I have existing supply of ZEDBOARDS REV D. I recently purchased four Zedboard (REV E boards). I am running into issues with REV E that produce a different result compared to REV D.

Here are the details:

- Vivado 2018.2 project with Zedboard selected as Board.

- Simple ZYNQ processing system added. (see design_1.tcl exported from Vivado using File > Export > Export Block Design).

- Hardware Exported and SDK Launched.

- Test Application Projects on Xilinx SDK created. One Application project based on Hello World Template and the other one based on Memory Test Template. NO CHANGES are made to the file. 

- Applications are downloaded via USB-JTAG port and run on REV D board (my old boards - I have 8 of these). Board is powered off. Swapped with new REV E boards (the new boards I purchased last week from Digilent). Application is run again. 

1) HELLO WORLD doesn't produce any output on terminal (REV E boards)

I have verified that the Vivado 2018.2 project and its SDK counterpart work on ALL of my REV D boards. However, the simple Hello World DOES not provide any output on terminal for ALL of the four ZEDBOARDS bought last week (REV E boards). So I know it is not the JTAG progamming header issue or the USB-to-UART driver issue. What is different in REV E vs REV D? 

 

Also can not find a single document or anything else related.

Can you provide me with necessary documents.

Sincerely...

 

 

[JColvin]

Hi @Haris Tauqeer,

You are correct; I misremembered the order. It is actually support (dot) digilent (at) ni (dot) com.

I apologize for the confusion and have updated my previous post for the correct contact.

Thank you,
JColvin

[Haris Tauqeer]

On 10/28/2020 at 11:47 AM, JColvin said:

Hi @Haris Tauqeer,

If you have a Rev E Zedboard that is not working as expected with the boot.bin files, please send an email to digilent (dot) support (at) ni (dot) com to discuss options for a working Rev E Zedboard. They will also be able to explain the finer details of what you experiencing rather than receiving second-hand details from myself.

Thanks,
JColvin

This doesn't seem to correct email address. My email was returned

[zygot]

25 minutes ago, JColvin said:

please send an email to digilent (dot) support (at) ni (dot) com to discuss options for a working Rev E Zedboard. They will also be able to explain the finer details of what you experiencing rather than receiving second-hand details from myself.

On the subject of the Zedboard versions.

I have a Rev C... one with an ES ZYNQ device. I'm not sure that there is a version of Vivado that explicitly supports ES silicon. My board is from the ISE era.

If there's any source of information that explains the differences between all of the Digilent and Avnet Zedboard versions I haven't been able to find it. This information shouldn't be too hard for a vendor to keep track of. Making users engage in private communications to figure out why their board doesn't behave as expected doesn't seem to be a good way to do business. For people like me, who might want to post a Zedboard project not having sufficient information available to determine if the effort is usable for other Zedboard owners of various revisions is a real issue.

The Zedboard isn't the only one that has undergone numerous 'plastic surgeries' to improve its looks. The KC705 has so many changes over the years that even Xilinx can't keep track of them.  It's a shame to see really good products suffer from bad documentation to the point of making it difficult for users to solve problems having nothing to do with their designs.

[JColvin]

Hi @Haris Tauqeer,

If you have a Rev E Zedboard that is not working as expected with the boot.bin files, please send an email to digilent (dot) support (at) ni (dot) com to discuss options for a working Rev E Zedboard. They will also be able to explain the finer details of what you experiencing rather than receiving second-hand details from myself.

Thanks,
JColvin

[Haris Tauqeer]

20 hours ago, Haris Tauqeer said:

Whats the difference between Rev E and Rev D boards. We recently got a ReVE Zedboard but other than the boot image provided with the board none of our uboots are able to boot. Same Uboot works fine on other boards. 

Even if I download the prebuilt sd image from digilent website, I am not able to boot using the provided BOOT.bin. Only the BOOT.BIN on SDCard which came with board works. Please provide details if there is anything different in Rev E. 

[Haris Tauqeer]

Whats the difference between Rev E and Rev D boards. We recently got a ReVE Zedboard but other than the boot image provided with the board none of our uboots are able to boot. Same Uboot works fine on other boards. 

[Bianca]

@Ayexor 

Please write an email at support@digilentinc.com with the number of REV E you currently own and their serial number and I'll pick it from there.

Thanks,

Bianca

[Ayexor]

Same problem here. Custom project with a FreeRTOS does not start at all. Running a simple memory test from template code returns fail on all ddr memory.

[Bianca]

Hi @yunus,

We received an email on support regarding your issue from the distributor. We'll move the discussion there. Also, please check your private messages.

Thanks,

Bianca

[JColvin]

Hi @mcc,

There are some options available; I have you sent you a PM.

Thank you,
JColvin

[mcc]

Hi,

I am having the same problem with Rev. E board using 2018.2.  I am not getting a response from my Rev.E Zedboard when I try to use it from SDSoC (both for standalone and linux applications) using the XilinX SDSoC tutorials, even though the Zedboard works fine with the out-ofbox SD Card image. I am also seeing similar errors with the memory tests.

Are there any workarounds?

Thank you very much in advance for your help.

Regards,

MCC

[JColvin]

Hi @inselcontroller,

I have sent you a PM as well.

Thanks,
JColvin

[inselcontroller]

Hello,

I seem to have a similar issue with my Rev. E board and Vivado+Vitis 2019.2, showing the same symptoms stated above.

While PL-only designs seem to work fine, any design involving the PS fails after download. A verified working Petalinux 2019.2 will not load into u-boot.

Are there any workarounds or updates available for this problem?

Thanks!
Best regards,

[JColvin]

Hi @andgnd,

I have sent you a PM as well.

Thanks,
JColvin

[andgnd]

I have a similar problem with board revision E. An image which runs on Board Rev D does not boot with our new board. I can also not start the application with the Vitis IDE. I get following output when I start the debugging process:

Setting PC to Program Start Address 0x00100000
Successfully downloaded C:/Projekte/Multiface3/FPGA/Multiface2plus/Multiface2plus.vitis/Multiface3_application/Debug/Multiface3_application.elf
Info: ARM Cortex-A9 MPCore #0 (target 2) Stopped at 0x0 (Vector Catch)
_vector_table() at asm_vectors.S: 50
50:     B    _boot
xsct% Info: ARM Cortex-A9 MPCore #0 (target 2) Running

What changes do I need to make for Board Rev E.?

 

[JColvin]

Hi @aranurea,

I have sent you a PM.

Thanks,
JColvin

[aranurea]

Hi, JColvin. I have a Rev E board as well and cannot get the board to output anything wither. Same exact syptoms here. Memory tests output just fine but DDR says failed. I've been trying to understand the issue for a month now. If you PM'd NEP with a solution, please PM me as well.

[JColvin]

Hello,

I have sent you a PM about this.

Thanks,
JColvin