High Speed PMOD Differential pair

[Clyde]

What I/O standard should I select if I want to drive a high speed PMOD port differentially?  and for Receive?

It seems like with Vcco at 3.3V  this is not possible with the native I/O buffers.

Clyde

[zygot]

7 hours ago, Clyde said:

It seems like with Vcco at 3.3V  this is not possible with the native I/O buffers.

You are correct. For practical work you can't use Digilent's differential PMOD connectors for differential interfaces. See the Differential POD Challenge in the Digilent Project Vault for some light reading on the issue.

Numato Labs makes the Mimas A7 with a lot of IO. It has well matched differential traces to the IO headers which are, oddly, 0.1" 80 pin female connectors. Even more oddly, the GPIO IO Banks are powered by 3.3V. Why would anyone do that???? The good news is that you can change the Vccio to 2.5V by replacing one (tiny ) resistor. I know because I've done just that. You can order the board with 1.8V, 2.5V Vccio, so I've been informed by Numato Labs' technical support. The bad news is that India is having its own COVID issues and there are no boards in stock, last time I checked. It's an Artix A75T with similar video connectors to the Nexys Video and a good deal cheaper. All in all a very usable platform. If only I could buy a few more...

Boards with SYZYGY ports support true differential IOSTANDARD signalling. I'd advise looking at one without a ZYNQ on board. The SYZYGY connectors are high performance but not impossible to work with if you want to make your own PCB add-on board.

 

[Clyde]

Thank  you for the reply.  I am WFH and putting together a build that will run on Ultrascale hardware at work, and I  thought I would try the simple version at home.  Not a big deal.  I can still prove the concept.

While we are here, is it possible to access the MII interfaces from the PL fabric on the Zynq device, if one disables their use from the ARM processor?  I have read the Technical reference manual, but there is a lot of material to digest there.

Clyde

[zygot]

1 hour ago, Clyde said:

is it possible to access the MII interfaces from the PL fabric on the Zynq device, if one disables their use from the ARM processor? 

No, You can connect one of the ARM MACs to an external Ethernet PHY through the PL but not the other way round. It would be swell if it were possible to do what you ( and I ) want... but no.

 

[Clyde]

The Zynq is an amazing device.  Early on I was going to blink an LED with a loop in C on one of the processors.  So, I put a delay loop for (i=0; i< 10000; i++) etc.  I had to make the delay counter a billion!  I still have a lot to learn.  Countless hours of entertainment.

CRS

[zygot]

16 minutes ago, Clyde said:

Early on I was going to blink an LED with a loop in C on one of the processors. 

The ARM cores, even on the lowly Z7020 device, are quite fast for software appropriate tasks. If you are flipping MIO signals in ARM software you can do this at impressive rates. If you try to flip PL pins using the ARM processor though a Xilinx AXI peripheral then you are going to create bus errors unless you slow down the processor with delays. But there is the possibility of writing you own AXI interfaces and getting better results. The best plan is to let the PL logic do what the PL is good at and let the ARM cores do what they are good at and figure out how to make them communicate in harmony.