Iceman2020 Posted July 27, 2020 Share Posted July 27, 2020 (edited) Can you please create statement of volatility docs for Cmod A7-15T and Cmod A7-35T, similar to the thread below. Edited July 27, 2020 by Iceman2020 Link to comment Share on other sites More sharing options...
1 JColvin Posted March 13, 2023 Share Posted March 13, 2023 Hi @NickTS, Thank you for the heads up; I have re-posted the Statement of Volatility's on the Cmod A7 Resource Center here: https://digilent.com/reference/programmable-logic/cmod-a7/start#documentation. Let me know if you have any questions. Thanks, JColvin Link to comment Share on other sites More sharing options...
0 JColvin Posted July 28, 2020 Share Posted July 28, 2020 Hi @Iceman2020, I ask for these materials for you. Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted August 3, 2020 Author Share Posted August 3, 2020 On 7/27/2020 at 10:19 PM, JColvin said: Hi @Iceman2020, I ask for these materials for you. Thanks, JColvin Hi @JColvin, any update on this? Link to comment Share on other sites More sharing options...
0 JColvin Posted August 6, 2020 Share Posted August 6, 2020 (edited) Hi @Iceman2020, I apologize for the delay, it look longer than expected. I have attached the two pdfs. Let me know if you have any questions. Thanks, JColvin Statement of Volatility Cmod A7-35T.pdf Statement of Volatility Cmod A7-15T.pdf Edited August 17, 2020 by JColvin Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted August 6, 2020 Author Share Posted August 6, 2020 On 8/5/2020 at 5:01 PM, JColvin said: Hi @Iceman2020, I apologize for the delay, it look longer than expected. I have attached the two pdfs. Let me know if you have any questions. Thanks, JColvin Thanks, @JColvin. The attachments call CSG324 package but the FPGA device on the Cmod is CPG236. Link to comment Share on other sites More sharing options...
0 JColvin Posted August 7, 2020 Share Posted August 7, 2020 Hi @Iceman2020, You are correct. I have edited the original posting to now contain this correction. Thank you, JColvin Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted August 17, 2020 Author Share Posted August 17, 2020 On 8/7/2020 at 5:34 PM, JColvin said: Hi @Iceman2020, You are correct. I have edited the original posting to now contain this correction. Thank you, JColvin Hi @JColvin It looks like you only changed the last number and now it's actually an invalid part number. Can you replace all "1CSG326C" with "1CPG236C". Link to comment Share on other sites More sharing options...
0 JColvin Posted August 17, 2020 Share Posted August 17, 2020 Hi @Iceman2020, ...So I did. I have updated the original posting (direct link to post). For my own personal curiosity, what are the Statements of Volatility needed for? The only non-volatile memory that users should typically interact with is the flash memory, but that can be easily over-written with a different board configuration or erased entirely, and messing with the EEPROM usually results in bricking the board such that it can't be recognized by the Xilinx software and can no longer be configured. If a known working configuration is needed, there are a number of examples including the out-of-box designs available on the Digilent GitHub (link). Thanks, JColvin Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted September 7, 2020 Author Share Posted September 7, 2020 Thanks for the updated docs and the additional information, @JColvin! The docs are needed for security compliance. Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted September 9, 2020 Author Share Posted September 9, 2020 On 8/17/2020 at 4:13 PM, JColvin said: Hi @Iceman2020, ...So I did. I have updated the original posting (direct link to post). For my own personal curiosity, what are the Statements of Volatility needed for? The only non-volatile memory that users should typically interact with is the flash memory, but that can be easily over-written with a different board configuration or erased entirely, and messing with the EEPROM usually results in bricking the board such that it can't be recognized by the Xilinx software and can no longer be configured. If a known working configuration is needed, there are a number of examples including the out-of-box designs available on the Digilent GitHub (link). Thanks, JColvin Hi @JColvin, I need additional information. The USB controller circuit is a black box. So how exactly would the EEPROM be accessed by a user? Also, the doc references a Digilent API. Where is the API and can a user revert the EEPROM contents to factory default? Link to comment Share on other sites More sharing options...
0 Iceman2020 Posted December 15, 2020 Author Share Posted December 15, 2020 On 9/9/2020 at 3:40 PM, Iceman2020 said: Hi @JColvin, I need additional information. The USB controller circuit is a black box. So how exactly would the EEPROM be accessed by a user? Also, the doc references a Digilent API. Where is the API and can a user revert the EEPROM contents to factory default? Hi @JColvin, the Xilinx 7-series product selection guide lists the distributed RAM as 400 kb for the XC7A35T. Also the last entry in the volatility statement still calls 1CSG326C instead of 1CPG236C. Can you please revise? Link to comment Share on other sites More sharing options...
0 JColvin Posted December 17, 2020 Share Posted December 17, 2020 Hi @Iceman2020, You can access the EEPROM through an executable provided by Digilent staff on a case-by-case basis which has a "wizard" to reset the EEPROM back to factory defaults by properly selecting the correct connected board and board type via the USB connector. Digilent otherwise does not provide details on the USB controller (which would normally be present on the intentionally blank page of the board's schematic). Alternatively, the EEPROM can be accessed via USB through other freely available 3rd party applications such as FT_PROG, though as hundreds of customers have learned, this can easily result in erasing or corrupting the embedded EEPROM such that the board is no longer detected or programmable by Xilinx software, usually turning the board into a paperweight. I have gone through the two documents again, hopefully having corrected the errors related to the naming of the FPGA part and it's associated RAM values this time and not listing the values for a different Artix 7 IC. Thank you, JColvin Link to comment Share on other sites More sharing options...
0 NickTS Posted March 13, 2023 Share Posted March 13, 2023 Hi, could Digilent please re-post the Statement of Volatility for the Cmod A7-35T? The pdf in the thread has become unavailable. Thanks! Link to comment Share on other sites More sharing options...
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Iceman2020
Can you please create statement of volatility docs for Cmod A7-15T and Cmod A7-35T, similar to the thread below.
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