arty ddr3 Arty Rev C XDC Files Compatibility with Vivado 2012

[jartim]

Hi, I am new to the FPGA world and have just purchased an Arty dev kit from Farnell. 

I received a rev C Arty, which I thought was the current revision, only to find when I got started that it is an older board that has since been replaced by the Arty A7 rev E.

My question is, is the Arty rev C "Arty-Master.xdc" file (which actually says Rev B on the first line!) compatible with the current Vivado 2020.1 build?  If not, which XDC file(s) should I be using?

The reason I ask is that I've been trying to include the DDR3 block from the board package but Vivado throws a couple of errors and doesn't add the block correctly. In fact it looks as though it reverts the block to an undefined MIG7.

The errors I get -

Quote

ERROR: [BD 41-245] set_property error - Validation failed on parameter 'XML_INPUT_FILE(XML_INPUT_FILE)' for Specified PRJ file is not readable  'j:/SJL/FPGA_Projects/MicroBlazeDemo/MicroBlazeDemo.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0_1/board.prj'
. BD Cell 'mig_7series_0'
Customization errors found on 'mig_7series_0'. Restoring to previous valid configuration.

ERROR: [Common 17-39] 'set_property' failed due to earlier errors.

This is all happening while running through the Microblaze demo from the website.

Any help would be gratefully received.

Regards

Tim

[jartim]

Fixed!

My projects are stored on a network drive and that appears to be what is causing the issue.

Don't understand why or how this makes the placement fail, but it does.

If I create and store the project on my local hard-drive in my documents folder, everything works fine!