New install problems, Eclypse Z7... SDK not working right

[mor.paul]

Hi,

When below applies to running bare metal demo ADC, the linux version also seems to have similar problems.

I'm having problems running ADC demos for Eclypse Z7.  I can not connect to the Linux TCF agent, so the degug doesn't work.  I am unable to figure out the IP address to use for the PROG port.  Also, when I build a program and run it the base code goes out to lunch.  I put some print statements in main() and I see the print output on a terminal connected to USB1.  The program calls  adcZmod.acquireImmediatePolling(acqBuffer, length) but it never returns. 

This is what I know is working:

The meaningless demo that lights some LEDs and shows the switches on the board work.

The computer connects to the Z7 through USB1 using Putty.

The SD card with the debian operating system installed.

Most of the Xilynx SDK, with the exception of TCF agent and debug

This is what I recently installed on my computer:

Ubuntu 18.04 64 bit

Vivado 2019.1

Xilinx SDK 2019.1

PetaLinux 2019.1

git clone --recursive https://github.com/Digilent/Eclypse-Z7-SW.git -b zmod_adc_dac/master

I have run out of ideas what to check.

Thanks,

Paul

 

[zygot]

You've probably noticed by now that, of posts replying to questions on the Digilent forums, the ratio of posts by Digilent staff is quite low. No doubt they're busy working on new new things to create reasons for customers to ask questions about.... OK that wasn't quite fair... but probably closer to the truth than anyone wants to believe. Everyone will be happier when Digilent imposes a more professional approach to maintaining product supporting material.

 

[zygot]

1 hour ago, mor.paul said:

I used a crossover cable

In general, Ethernet PHYs are smart enough to detect and handle cross-over automatically, if set to do so. But you've gotten your Eclypse-Z7 and SDK talking so it's a non-issue.

[mor.paul]

As I mentioned earlier, I was unable to the connect PC directly to the Eclypse board a single ethernet cable.  Without a router, I used a crossover cable and the following cmd lines.

Computer: sudo ifconfig enp3s0 192.168.1.1 netmask 255.255.255.0 up

Eclypse:     sudo ip a add 192.168.1.100/255.255.255.0 dev eth0

In Xilinx SDK the Linux TCF agent is now working.

I'm not sure a cross-over cable is required, but it was recommended when I googled the connection method.  Special thanks to my friend at work that showed me how to configure

the computers this way.

Paul

ps. I am still wondering why the demo programs compile, download the board and start running.  The bare metal program gets stuck going out of main(), some time after the first function is

called.  The linux demo is also having a problem, the program is doing something I can not figure out what it is doing?

[mor.paul]

@lonel,

Thank you for the reply to my message. Paul

[Ionel]

@mor.paul

tcf-agent works over ethernet thus the board needs to be in the same network (yes via a net cable) with the host machine that is running XSDK.
As stated in documentation finding IP address is done via prog port(UART).
The documentation makes the assumption that the IP address is allocated by the dhcp server (the router).

Did you manage to receive an IP address from the router?

If yes, does testing connection in XSDK tcf-agent was successful ?

Do you have other tcf-aggent connection issues?

The UART prog port is used to have access without a network connection. In this case to find out allocated IP address.

There are to many subjects discussed in this thread. So I will not try to answer all of them.

[mor.paul]

Also, still having problems getting Xilinx SDK to communicate with linux TCF agent.  One of my console reported tcfchan#4 was closed after stopping a process.

[mor.paul]

I went looking for my boss to ask about a scope.  I think he went on holiday... maybe next week?  Summer is a weird time to work in Europe.  Everyone is on holiday whenever you need something.

On a brighter note, I figured out my problems with the compile errors about incorrect header files...  I missed the part about copying the image file along with the other files in the zip to a directory on my system.  I figured this out when I install V.1 of the image file on my SD card.  I guess those files were the ones I needed to reference for the SYSROOT environment in SDK.  I no longer get build errors.  Now the problem is the bare metal and linux program don't do anything yet.  I'll start another thread when I have a question I can't figure out.

Quote

How are you going to get your samples into the application where you want to process them?

I normally process my data in MatLab or excel.

[zygot]

3 hours ago, mor.paul said:

f I can get 128K samples this would capture what I'm looking for.

128K samples/channel is the best that I could figure out how to do using different Xilinx AXI IP. That means doing you own VHDL design and development using only Digilent's low level code. It's not a trivial proposition. You could try out one of Dan's AXI Master DMA code examples and move more samples to the PS DDR but again this involves considerable HDL coding/debugging. Even Dan doesn't know how to use his AXI IP within the Vivado HW/SW tools because he doesn't package it in a way that the tools understand and eschews the 'normal' FPGA development flow. But, even after all of that, how are you going to trigger you capture? How are you going to get your samples into the application where you want to process them? Finally, after you've overcome all of those obstacles you will have to write you own ZYNQ PS code from scratch..... and on and on.... 

Sounds to me like you have enough excitement left on the project doing some very challenging soldering work.

Come  back to your Eclypse as a retirement exercise for mental maintenance.

[mor.paul]

@zygot,

Thanks for the reply.  Yes, I am a little stubborn.  I am also in a box because I don't have access to any other equipment.  If I can get 128K samples this would capture what I'm looking for.  My sample deforms plastically, I'm only concerned about the force signal where the deformation occurs in the first 0.5 ms.  What happens to the voltage on the piezo transducer isn't as important to me.  Coming in as a visiting researcher has its' positives and negatives.  The plus side is I am free to do what ever I want.  The minus side is there isn't a lot of money to spend.  Also, knowing where find the right people, instruments and where to get things done is some times difficult and time consuming.  You are right, I am wasting my time now and I should find a 4 channel oscilloscope.  I need to work on my next challenge soldering micro wires to some very small magnetic field sensors and then interfacing them to an analogue input channel.

Paul

[zygot]

59 minutes ago, mor.paul said:

What to type in to reference the image file would be appreciated.

You don't want to muck with the repo OS image. You need to get your project settings correct. I've been using Xilinx tools for a long time and I had a hard time with it. I'm going to wait for someone from Digilent to own this as they are the ones who made this so difficult.

I still don't get your end game as even if you can get 128K samples this still gets you about 1 ms of data capture. But I appreciate your determination to resolve problems.

[mor.paul]

Yes, I was wondering about this earlier today.  The Digilent documentation is very foggy about this.  Is there anyone from Digilent that can clarify this for me??

What to type in to reference the image file would be appreciated.

Thanks,

Paul

[zygot]

Life would be easier if all Linux was, well the same Linux. You need to reference the Debian OS image provided by the Digilent repo not your OS headers.

[mor.paul]

Hi,

I had this posted in the intro section but I decided to move this question over here.  I'm currently working on the SDK connection problem and SDK compiling errors below.

This afternoon working on errors related to include paths and errors generated from the header files.  I basically think my Xilinx SDK build paths / include files in the project folders are not set right.  If I knew what directory the right files were in I'm pretty sure I could the build settings and compile.  Here are the files that are having problems:

/usr/include/bits/floatn.h:75:70: error: unknown machine mode ‘__TC__’

/usr/include/bits/floatn.h:87:9: error: ‘__float128’ does not name a type;

/usr/include/stdlib.h:152:8: error: ‘_Float128’ does not name a type

/usr/include/stdlib.h:245:4: error: ‘_Float128’ has not been declared

/usr/include/stdlib.h:330:8: error: ‘_Float128’ does not name a type

src/zmodlib/ZmodDAC1411/subdir.mk:18: recipe for target 'src/zmodlib/ZmodDAC1411/zmoddac1411.o'

You wouldn't think these header files could cause any heartache

Time to head out.

Thanks, Paul

[zygot]

@mor.paul,

I recreated the bare-metal demso on Win10 and the Linux demos on Linux. On my machine I have 2 Ethernet ports. One is connected to the OS and uses DHCP to set the Ethernet port address and parameters. The other I manually set to a static address. Connecting to external devices like an FPGA board still  has a few hurdles but is a lot easier on Linux than Windows. I also use a direct cable connection between the PC and the target ethernet ports.

My installation SDK has no problem finding and connecting to the Eclypse-Z7. It's been too long for me to remember if I was running Debian on the Eclypse-Z7 while running the Linux demos, but the SDK seems to be pretty smart about using Ethernet.

[mor.paul]

Hi Ionel,

Thanks for the reply.  I am confused about your question.  Are you referring to an ethernet cable or a USB cable?  Nothing in the instructions I attached and I was following mention an ether net cable.  In any event I am connected to the board on the connector referred to the "PROG" and on my case for the board the port is called JTAG & UART.  The USB cable is connected directly to the PC USB port.  I do wonder if the ethernet port can be used for an ethernet connection in the future.  Is there any documentation how to use the ethernet port?

Thanks,

Paul

 

[Ionel]

 

Quote

2: eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc pfifo_fast state DOWN group default qlen 1000

Did you connect the cable to a router or directly to your pc ?

[mor.paul]

Thank you for the reply.  Instructions I'm following say nothing about connecting the ethernet port. I have been doing almost everything with the PROG port.  I did try an ethernet cable for curiosity, no luck.  Below I have pasted the instructions I followed.  Here is the result of booting up the board and logging into the board followed by ip a on the terminal.  And yes, I have a problem thinking that serial ports have IP addresses, but that's what the instructions appear to say.

Thanks, Paul

 

eclypse@eclypse:~$ ip a

1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN group default qlen 1000

link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00

inet 127.0.0.1/8 scope host lo

valid_lft forever preferred_lft forever

inet6 ::1/128 scope host

valid_lft forever preferred_lft forever

2: eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc pfifo_fast state DOWN group default qlen 1000

link/ether 00:18:3e:03:47:25 brd ff:ff:ff:ff:ff:ff

3: sit0@NONE: <NOARP> mtu 1480 qdisc noop state DOWN group default qlen 1000

link/sit 0.0.0.0 brd 0.0.0.0

eclypse@eclypse:~$

 

 

 

[Ionel]

Hi, @mor.paul
You say that USB1 using Putty. is working.
Login using posted username and password for that debian image then
run command:
sudo ip a
Same password as above.
In the  output search for a line under eth0 starting with inet CIDR_ip_address brd ....
Use only the IP address in CIDR_ip_address for tcf-agent.
If eth0: state is DOWN then there may be other problems.

Quote

.... I am unable to figure out the IP address to use for the PROG port...

Current software has no ethernet over USB. You need to make sure you have your computer running XSDK
connected in same network with the board via ethernet.