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Cortex-M3 on Arty A35T minimal SoC


After spending time fighting Vivado and the Cortex-M3 tutorials I decided to build my own minimal SoC based on the Cortex-M3. The build process is pretty seamless in linux using fusesoc. I realize this may not be helpful for people more accustomed to the Vivado drag and drop flow but if you're a linux user and want to get straight into editing verilog and validating in hardware then this may be helpful.

It contains swappable Cortex-M3 cores. One is the obsfucated core from ARM which will synthesize on any FPGA (and can also be simulated using Verilator). The second is the encrypted core that can only be synthesized under Xilinx/Vivado but can be further optimized by the tools for higher performance/lower resource usage.

The basic SoC consists of:

  • CM3 core
  • AHB3lite interconnect (native CM3 bus)
  • fusesoc AHB generator to automagically add new AHB master/slaves
  • Builtin handling of exclusive read/write on sysbus
  • Inferred ROM/RAM for code/data storage
  • AHB3 to APB4 bridge
  • Simple GPIO peripheral

Also included is a Verilator test bench to simulate the SoC without hardware. Once synthesized, the firmware can be debugged over JTAG/SWD (with external JLink, etc). The best part is once the dependencies are installed and the tinylabs-cores library is included compilation/simulation is just one command line:

fusesoc run --target=sim cm3_min_soc (simulation)

fusesoc run --target=synth_arty cm3_min_soc (synthesis)

Hope this helps someone!

Directions and more info here: https://github.com/tinylabs/tinylabs-cores

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