Just like this post here, my out of the box example's ethernet is not working. In trying to follow the guide. Changed link speed to 100 as it said.
The echo server isn't working, keeps saying the link is up then down, and my computer keeps connecting then disconnecting. All within about a second, so I don't have nearly enough time to see if anything is working even when it is "connected". So then I tried the peripheral test project, and I got an "AxiEthernet: Rx fifo over run" on the "AxiEthernetSgDmaIntrExample". So I increased the rx buffer in the IP re-customization to the max 32KB, no luck. I added some outputs to try and debug it, added the Axi dma bd ring checks to the tx & rx buffers, both pass. The example also errors with "Length mismatch" as it is not receiving everything it sent. When I do a debug launch I don't get the fifo over run, so either a coincidence or something is acting up. I also have it printing out the lengths of the rx/tx, tx is 1014, rx varies as low as 60 and as high as 216 from what I've seen so far. All the other tests (ethernet dma, timer ctr, timer interrupt, axi intc) passed. When I try unplugging the ethernet cable it hangs on waiting for the bytes to come back which I suppose makes sense. I'll attach my xsa.
I've been setting the programming mode to JTAG so as far as I know the builtin example is still sitting there on the QSPI for if I need it. I couldn't get the code to build with 2020.1 even after upgrading everything, so I can't try that as a fix.
EDIT: managed to get the echo working by polling the BMSR register and waiting for the negotiation complete bit to be set
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dylan.shekter
Just like this post here, my out of the box example's ethernet is not working. In trying to follow the guide. Changed link speed to 100 as it said.
The echo server isn't working, keeps saying the link is up then down, and my computer keeps connecting then disconnecting. All within about a second, so I don't have nearly enough time to see if anything is working even when it is "connected". So then I tried the peripheral test project, and I got an "AxiEthernet: Rx fifo over run" on the "AxiEthernetSgDmaIntrExample". So I increased the rx buffer in the IP re-customization to the max 32KB, no luck. I added some outputs to try and debug it, added the Axi dma bd ring checks to the tx & rx buffers, both pass. The example also errors with "Length mismatch" as it is not receiving everything it sent. When I do a debug launch I don't get the fifo over run, so either a coincidence or something is acting up. I also have it printing out the lengths of the rx/tx, tx is 1014, rx varies as low as 60 and as high as 216 from what I've seen so far. All the other tests (ethernet dma, timer ctr, timer interrupt, axi intc) passed. When I try unplugging the ethernet cable it hangs on waiting for the bytes to come back which I suppose makes sense. I'll attach my xsa.
I've been setting the programming mode to JTAG so as far as I know the builtin example is still sitting there on the QSPI for if I need it. I couldn't get the code to build with 2020.1 even after upgrading everything, so I can't try that as a fix.
EDIT: managed to get the echo working by polling the BMSR register and waiting for the negotiation complete bit to be set
design_1_wrapper.xsa
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