I have multiple beginner questions for Vitis with ZYBO (7010).
I have a simple project writing to RAM via DMA with AXI on my ZYBO. ( XADC - tlastgen - DMA -> PS ).
I finished the pipeline in Vivado and exported the HW as xsa and started a platform in Vitis and now want to begin an Application project in order to test the functionality.
I want to stream/visualize ADC values in the terminal on my host PC and see it by UART. I am unsure what is required to develop the hello-world example into this kind of application and how to work with the board. Below I have topically sorted all of my current challenges and enumerated them. I hope it is easy to gain an insight into the ideas. I would gladly supply logs or further information if required.
Board-related questions:
1. Right now I have no SD card and have the micro-usb (UART/PROG) as a power-source, hardware configuration, UART connection and I want to flash the standalone hello-world example form Vitis to the board. Is this the way to go? Can I directly write the FSBL files /application project to on-chip flash or do I need an SD Card? (1.1) How do I do it? (1.2) Is this all even possible with just one micro-usb? (1.3)
2. In hardware (ZYNQ PS block) I turned on UART 1 in MIO. Does this need to be turned on? (2.1) Because when I connect the board (I use Ubuntu on the host) and turn it on both /dev/ttyUSB0 and /dev/ttyUSB1 appear, even though I only turned on UART1. After doing "sudo picocom -b 115200 /dev/ttyUSB1" it looks fine, but Vitis is throwing an error when I want to create a shell on /dev/ttyUSB1. (permission denied) (2.2)
DMA and software related questions:
3. As I understand, my DMA (no CDMA/VDMA) starts writing to the specified RAM address that I can see in Vivado. Since this is my first working example, I have an ADC with a high sample rate just forwarding to the DMA in a high rate and I have 512MB of RAM for the DMA. Will it just deposit 16bit blocks one-by-one until it is full? (3.1) How do I reset it to start again on the first address? (3.2)
4. My plan was to take the Hello-World example and just read the contents of the RAM locations in 16bit/2byte blocks and convert them (char * data = 0x0000000;), maybe visualize so I can see if the output of the DMA-ADC toolchain is correct. Will I need libraries instead? (4.1)
5. I took the tlast generator from the 233 Example of Adam Taylors MicroZed chronicles. It is just generating a tlast signal for AXI Stream to work between XADC and DMA. Adam Taylor referenced a Xilinx example and I borrowed the IP there. According to him I included a GPIO pin to control packet length of the tlast signal. How do I access this GPIO? (5.1)
I would be grateful for any help and answers to my questions and I hope this is the right place. If there are any documents that would help me, please point me in the right direction.
This is my first FPGA/SoC project and I plan to include a VHDL block for integration of the ADC values when I get this minimal example to work.
I have a bit of trouble in sorting all the new knowledge and knowing where to look for solving these broad problems.
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DrF16
Hey guys,
I have multiple beginner questions for Vitis with ZYBO (7010).
I have a simple project writing to RAM via DMA with AXI on my ZYBO. ( XADC - tlastgen - DMA -> PS ).
I finished the pipeline in Vivado and exported the HW as xsa and started a platform in Vitis and now want to begin an Application project in order to test the functionality.
I want to stream/visualize ADC values in the terminal on my host PC and see it by UART. I am unsure what is required to develop the hello-world example into this kind of application and how to work with the board. Below I have topically sorted all of my current challenges and enumerated them. I hope it is easy to gain an insight into the ideas. I would gladly supply logs or further information if required.
Board-related questions:
1. Right now I have no SD card and have the micro-usb (UART/PROG) as a power-source, hardware configuration, UART connection and I want to flash the standalone hello-world example form Vitis to the board. Is this the way to go? Can I directly write the FSBL files /application project to on-chip flash or do I need an SD Card? (1.1) How do I do it? (1.2) Is this all even possible with just one micro-usb? (1.3)
2. In hardware (ZYNQ PS block) I turned on UART 1 in MIO. Does this need to be turned on? (2.1) Because when I connect the board (I use Ubuntu on the host) and turn it on both /dev/ttyUSB0 and /dev/ttyUSB1 appear, even though I only turned on UART1. After doing "sudo picocom -b 115200 /dev/ttyUSB1" it looks fine, but Vitis is throwing an error when I want to create a shell on /dev/ttyUSB1. (permission denied) (2.2)
DMA and software related questions:
3. As I understand, my DMA (no CDMA/VDMA) starts writing to the specified RAM address that I can see in Vivado. Since this is my first working example, I have an ADC with a high sample rate just forwarding to the DMA in a high rate and I have 512MB of RAM for the DMA. Will it just deposit 16bit blocks one-by-one until it is full? (3.1) How do I reset it to start again on the first address? (3.2)
4. My plan was to take the Hello-World example and just read the contents of the RAM locations in 16bit/2byte blocks and convert them (char * data = 0x0000000;), maybe visualize so I can see if the output of the DMA-ADC toolchain is correct. Will I need libraries instead? (4.1)
5. I took the tlast generator from the 233 Example of Adam Taylors MicroZed chronicles. It is just generating a tlast signal for AXI Stream to work between XADC and DMA. Adam Taylor referenced a Xilinx example and I borrowed the IP there. According to him I included a GPIO pin to control packet length of the tlast signal. How do I access this GPIO? (5.1)
I would be grateful for any help and answers to my questions and I hope this is the right place. If there are any documents that would help me, please point me in the right direction.
This is my first FPGA/SoC project and I plan to include a VHDL block for integration of the ADC values when I get this minimal example to work.
I have a bit of trouble in sorting all the new knowledge and knowing where to look for solving these broad problems.
Thank you very much in advance!
DrF16
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