Xilinx/Digilent webinar on integrating ARM Cortex -M into FPGA


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I'm interested in this virtual workshop: https://mautic.digilentinc.com/arty-s7-workshop-land-page

but, timezone totally outside of my living hours. I hope the content might be available on Demand later. 

I'm wondering, can I use another Digilent board with series 7 for this?  The webinar list uses Arty S7, but I just bought Nexys A7, for students.  Can I use it for the workshop / the purpose of incorporating ARM's IP ?  (and hopefully trying out something with them).

 

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Hi @dry,

I'm not certain if the content will be on demand later. I will ask the product manager about this to see what they know about it.

In general though, the principles will be applicable to other boards, such as the Nexys A7. What I don't know for certain is if the specific IPs and cores that are used in the demo that were/are created by Xilinx and ARM DesignStart, are compatible with other FPGA architectures besides the Arty S7; I imagine the demo is using the Cortex M1, which based on the DesignStart page only mentions the Arty S7 and the Arty A7, but perhaps the core is configurable to other sizes of Artix 7 chips such as the 100T present on the Nexys A7.

Thanks,
JColvin

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Hi @dry,

I was told that the materials should still be available on demand for a little while afterwards. We currently don't know how long it will be since there is a licensed tool involved, so I'm not certain on the time constraints associated with that.

I will update you when I learn more.

Thanks,
JColvin

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5 hours ago, JColvin said:

Hi @dry,

I was told that the materials should still be available on demand for a little while afterwards. We currently don't know how long it will be since there is a licensed tool involved, so I'm not certain on the time constraints associated with that.

I will update you when I learn more.

Thanks,
JColvin

Hi JColvin,

Thanks for your answers. I will make sure I check them next morning immediately when get up.

About licensed tool : which one, I only saw reference to Vivado WebPack (no special paid license neeed), and the ARM's IPs for M1, M3 - which are "free" as in beer, as I understand.

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Hi @dry,

The licensed tool is the Keil MDK (listed in the Required for the Workshop section). I know the product manager is attending this workshop which will start in about 15 minutes from time of writing so I will be able to provide some more details on this (since I haven't heard of this tool until about 5 minutes ago) after the workshop is over.

Thanks,
JColvin

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8 hours ago, JColvin said:

Keil MDK (listed in the Required for the Workshop section). I 

 

Based on a Xilinx + ARM presentation from 2019, my understanding that tool didn't require license to work on the M0/M1, M3, may be for purpose of targeting Xilinx chips only.

I might be wrong however.

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Hi @dry,

Maybe? I'm still waiting to hear back about the finer details of posting, but #4 on the Required for the Workshop section says for the MDK Add-on that is to provide a license through May. What the details of that license is, I'm not sure of yet, but I'll let you know when I learn more.

Thanks,
JColvin

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Btw,

Tried now the Zoom meeting invite emailed - for past workshop - and says Webinar expired...

If you could message or share how to access the (hopefully saved) webinar, it would be great.  No rush ..

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Noted; hopefully somebody recorded it presuming that is a feature of Zoom meetings, otherwise that'll be a flop if that is not the case (in the lack of the feature or the lack of it being recorded). As of a bit shy of 5 hours ago, the product manager was waiting to hear back from ARM on how/when the materials will be published. I will follow up with them tomorrow morning to see if they have an update for me.

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I'll echo the interest in being able to watch the webinar after-the-fact.

If ARM doesn't want to make the training material (it's just a video ... is a video of Keil MDK really the issue?) available along side the free eval, then they're making a mistake.
People will just gravitate towards using the RISC-V cores. 

But without some kind of reference material, I (and I expect others) wont be able to use the core eval as an out-of-the-box solution will gravitate towards to the RISC-V cores that are out there. Everything with FPGAs is moving towards being less secretive and lowering unncessesary complexity ... 

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I attended that seminar, and unfortunately, all I got out of it was a sense of frustration. It was rushed through, and I was unable to get Lab 2 "Hello World" working. I sent a note to the instructors on Zoom, but it was unanswered. It should have been made clear in the email soliciting this seminar that expertise in Vivado 2018.2 and Keil uVision 5 as prerequisites. I do not know if my issues were due to a configuration issue in my computer or due to a nuance that was not covered in the course workbook provided to attendees. I repeated Lab 1 and Lab 2 ten times with the same result: the output of the "Hello World" lab was not as shown in the workbook.

 

I have requested an RMA for the materials purchased for that seminar, as they are useless to me now.

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42 minutes ago, kb5pgy said:

I attended that seminar, and unfortunately, all I got out of it was a sense of frustration. .......I have requested an RMA for the materials purchased for that seminar, as they are useless to me now.

Oh wow, sorry to hear that kb5pgy.

So far I didn't see it's accessible anywhere, not sure if Digilent will make it avail. 

Xilix forum has similar presentation - same board, same Vivado, same Keil.    Presentation available, but it's short, to say the least.  It's also full of just marketing material, with the tech steps or how-to part kept to bare bare minimum. Rushed and/ or almost 0.  (And so value of it is also not great, unless you were to get a first impression of what's involved in a very quick fasion).

However, I'm still to try, just need some time. Didn't look too involved. 

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@kb5pgy,

There's definitely a lot of information packed into this webinar. I'm sorry to hear it was frustrating and you weren't able to get the value out of it that you hoped. For future webinars, we will work towards more clearly articulating the experience level needed, and to improve the educational quality of the content itself. With this webinar in particular, we say no FPGA experience is required because the webinar goes step-by-step. However, it can still be challenging, especially with condensing so much information into a few hours. 

I hope that you were still able to get something out of it. You can find a recording at the original landing page where you registered for the event.(FYI @dry, to answer your original question). With this recording you can pause and back up as needed, and hopefully that will help you resolve some of your questions that we weren't able to answer during the webinar itself.

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On 5/3/2020 at 8:03 PM, dry said:

Oh wow, sorry to hear that kb5pgy.

So far I didn't see it's accessible anywhere, not sure if Digilent will make it avail. 

Xilix forum has similar presentation - same board, same Vivado, same Keil.    Presentation available, but it's short, to say the least.  It's also full of just marketing material, with the tech steps or how-to part kept to bare bare minimum. Rushed and/ or almost 0.  (And so value of it is also not great, unless you were to get a first impression of what's involved in a very quick fasion).

However, I'm still to try, just need some time. Didn't look too involved. 

First of all, I am not some hobbyist. I do this for a living in one of the most prominent centers of engineering in the world. I have also presented at NIWeek 2019.

Here's the problem. I went through the video from the beginning to where the Hello World code is downloaded to the board. There was no output to the terminal via the USB connection, and the buttons did nothing. The outputs of the tool chain were as expected, but the code did not work. Period.  There was also no already-compiled solution code that could be used as a reference for troubleshooting.

I am at the end of my rope with this. I wanted to recommend the Arty S7 board for data acquisition purposes for projects not requiring the horsepower of the Compact Reconfigurable Input/Output, but I am forced to conclude that this is not a solution.  To me, the S7 is a nice paperweight, but an expensive one.

The one thing that impresses me with NI is that there is a large library of sample code, and I refer to that library when working a new project. Unfortunately, there is very little in the way of sample code for this board.

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@Wyllyam

Workshop slides seems Ok.  Question: is that arty_s7 wrapper project provided by Xilinx or Digilent? Who to bug to ask for similar wrapper for Digilent's Nexys A7 board :)

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Hi @dry,

I'll still let @Wyllyam respond if they want to, but the wrapper project was created by Xilinx/ARM/Adam Taylor. Outside of designing and manufacturing the Arty S7, Digilent did not participate in the creation or presentation of this seminar.

Thanks,
JColvin

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