schematic error arty a7

[ejc]

I was trying to identify the net pins to the FPGA(artix-7 35T csg324) connected to the   shield io pins on an Arty A7 board.

The schematic left out io0, io34, and io7 or at least I have been unable to find them.        Can someone help me identify what the fpga pins are   so I can setup my constraints?

 

ejc

 

[JColvin]

Hi @ejc,

The best (or at least easiest) place to find IO pins will be the .xdc file that we created for the Arty A7-35T. You can find it and all of our other XDC files on our GitHub here: https://github.com/Digilent/digilent-xdc.

To answer your question specifically, the FPGA pins are as follows:

chipKIT Shield IO0 = V15
chipKIT Shield IO0 = T16
chipKIT Shield IO0 = R16

The reason you didn't readily find them on the schematic is because they are on a different part of the FPGA. They are present on page 6 of the schematic though: https://reference.digilentinc.com/_media/reference/programmable-logic/arty-a7/arty_a7_sch.pdf.

Let me know if you have any questions about this.

Thanks,
JColvin

[ejc]

I see that these pins are connected to the config.    I thought that perhaps I could use the shield pins as an additional pmod output or input.

However, if I do this will it upset anything in the arty a7 since these 3 pins are connected to the config?

[JColvin]

Hi @ejc,

No, it will not affect anything in terms of configuring and programing the FPGA. I ran a simple design that had those three pins output a logic high voltage when I enabled one of the on-board switches without any issues.

As a general rule of thumb, if a pin is listed in the Digilent XDC file, it will be available for use without any issues (provided you don't deliberately short the pins externally or something like that).

Let me know if you have any questions.

Thanks,
JColvin

[ejc]

Hi

I  decided to try using ip integrator instead of writing code in Verilog.  I am new to this.

I am at a loss for how to get the boards window or tab to work.   It is grayed out in the windows menu of the vivado  2019.2 program.

I did try following directions on the website about downloading board files and installing the tcl files with a path to where they were downloaded, but it isn't working.

I am using the artix-7 35t csg324 fpga board.

I could use some simple instructions on how to resolve this so I can move forward with learning it.

I tried YouTube, but it seems like  in their it videos  it   just works.  But they  use an older version of vivado than 2019.2.  

[ejc]

I finally figured it out.

[JColvin]

Hi @ejc,

I'm glad to hear it. For your future reference (perhaps you already found it) we have a guide on using the Vivado IP Integrator in 2019.2 available here: https://reference.digilentinc.com/vivado/getting-started-with-ipi/v2019.2.

I also tend to personally just copy paste the Digilent board files into the correct folder rather than running a script as described here: https://reference.digilentinc.com/vivado/installing-vivado/v2019.2#installing_digilent_board_files. The only caveat with this that I know of is that if you have Vivado open during this process, you have to close it out and re-open it so that Vivado refreshes itself and correctly finds the files you placed.

Thanks,
JColvin

[ejc]

Thanks.   I really appreciate how you point me to the right place for information that would of otherwise taken me much time to find.

I never did find the 2019 .2  getting started.   I only found lots of older stuff form 2015 to 2018.

Thanks again

EJC