CMOD A7 100 MHz clock in

[PTSmith]

So, I want to bring in a 100 MHz clock and route it to a CMT to generate a bunch of lower frequency clocks all phase-locked to the 100 MHz.

I appreciate I can't output an LVDS signal, but it looks like I should be able to bring in an LVDS signal as long as I supply my own 100 ohm termination to pins 18 and 19 for example.

Am I missing anything?

Paul Smith

Indiana University Physics

[xc6lx45]

Hi,

this doesn't answer your question but are you really sure that you need a differential clock input? There are cases where I would answer this question with "yes" but they seem unlikely for a CMOD A7 use case.

Also note, there is a semi-official mod to put your own 100 MHz oscillator on the module instead of the 12 MHz clock from USB (new oscillator in, one resistor out). Might be useful.

I remember there were issues on Artix with 2.5 V LVDS mode for inputs if the bank voltage is not 2.5 V (you can use e.g. 1.8 V single-ended inputs on a 3.3 V powered bank, but I think not LVDS). Maybe someone else recalls the details.

[PTSmith]

Hello xc6lx45,

I suppose I could live with a single ended clock input to the CMOD A7; I'm mainly worried about radiating noise to nearby sensitive analog circuitry so think differential would be quieter.

The mod to swap the oscillator on the CMOD A7 sounds interesting; I actually thought about this a while back.  But, the 12 MHz also goes to the USB through R80 (is this the resistor you mention removing?)  The USB bridge chip isn't shown on the schematics for some reason (I guess it's on the deliberately blank page 5) but unless there is some other option I would imagine the USB bridge doesn't work after this mod.  Is there more information on this mod somewhere?

If you look at table 1-55 in UG471 there is a superscript (1) for the LVDS_25 line which says "Differential inputs for these standards can be placed in banks with VCCO levels that are different from the required level for outputs. "  Also, at the bottom of page 92: "

It is acceptable to have differential inputs such as LVDS and LVDS_25 in I/O banks that are powered at voltage levels other than the nominal voltages required for the outputs of those standards (1.8V for LVDS outputs, and 2.5V for LVDS_25 outputs). However, these criteria must be met:

The optional internal differential termination is not used (DIFF_TERM = FALSE, which is the default value)."

So, I'm pretty sure I can use an LVDS input on the CMOD A7, although it would be nice to hear from someone who has actually done this.

 

[xc6lx45]

Correct - R80 needs to be unsoldered but the 12 MHz comes from USB. It has its own crystal, you can look at any FTDI 2232H schematic e.g. from Papilio Pro board or FTDI's own reference design. USB should work as before - otherwise you couldn't program the board as it has no JTAG broken out.

Note: A single clock management instance is fairly flexible, and you can cascade them to improve the granularity of the clock conversion ratio. The 12 MHz oscillator is a low cost component wrt performance but it may be the pocket knife that gets most of the work done.

I see your point for the LVDS_25 input operation. Did you set the common mode biasing correctly when you tried?

BTW, In terms of noise coupling, the CMOD form factor may turn out to be problematic (1 GND pin... there was even discussion about designing in "software-controlled" ground pins by pulling IOs to constant LOW ).

[PTSmith]

OK, thanks for replying, xc6.  I found the clock thread here: you populate IC4 and remove R80.  I can put an Abracon ASEMB-100.00MHZ-LY-T there instead of the ASEM1 part on the schematic with better specs.  Hopefully this will keep the 100 MHz noise on the CMOD, so maybe a better solution than bringing it in on LVDS.

I haven't tried the LVDS_25 input as my CMOD is in my lab on campus and I'm not allowed to go in right now; so strictly thought based design work right now; mostly working on the system PCB.

Yes, the one ground pin only is a big drawback for the CMOD.  I've been thinking of allowing the option of soldering one or more braids from the CMOD ground to my PCB ground.  It's not obvious there is a place to solder to on the CMOD, though, so probably not a good idea.  There are two ground pins on the PMOD connector ...

I did find a thread discussing using leftover IO pins as extra grounds: No convincing evidence in this thread that this helps, at least no measurements.  Probably worth a try if all else fails, but I'm nervous about designing in the CMOD A7 and then not having it work.

I can probably get away with the single CMOD A7 ground pin but I wouldn't mind looking at some alternative boards; this does seem like the weakest point in the CMOD A7 package. 

[xc6lx45]

Well, the question is whether a breadboard-style module is the right choice for a noise-sensitive application. You may be able to get away with it by limiting simultaneous switching, e.g. staggering parallel bits on different clock cycles (/phases) if speed allows.

You might have a look at modules based on high density connectors. Picking one at random, http://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0710/REV02/Documents/SCH-TE0710-02-100-1Q.PDF with about 10 % of the pins GND. But, you'll need some JTAG interface solution.

[PTSmith]

The TE0725 looks like a good option for me.

[xc6lx45]

... if you need a Digilent-licensed JTAG to go along with it, this one might work

https://shop.trenz-electronic.de/en/TE0790-03-XMOD-FTDI-JTAG-Adapter-Xilinx-compatible?c=27

(note the on-board voltage regulator is fairly small. I've used it to power 100-size Artix for EEPROM programming and basic testing but that's more or less asking for trouble)
But if I'd do a PCB anyway I'd probably go for some Digilent JTAG "stamp" module.

[PTSmith]

I have several of these available from other projects; I guess it is what you mean by a "stamp" module:

https://store.digilentinc.com/jtag-hs3-programming-cable/