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In Vivado 15.1, my Retired Zybo(B3) Hello World-no errors but won't print


ZyboB3

Question

My Retired Zybo(B3) Hello World demo, as is in SDK, won't print. Otherwise, no errors.

>>>>>>>>>>  Using Vivado 15.1...., SDK log shows ….

 

source C:/____test/Hello_World15p1/Hello_World15p1.sdk/Hello_World15p1_wrapper_hw_platform_0/ps7_init.tcl
targets -set -filter {name =~"APU" && jtag_cable_name =~ "Digilent Zybo 210279A79095A"} -index 0
rst -system
targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279A79095A" && level==0} -index 1
fpga -file C:/____test/Hello_World15p1/Hello_World15p1.sdk/Hello_World15p1_wrapper_hw_platform_0/Hello_World15p1_wrapper.bit
targets -set -filter {name =~"APU" && jtag_cable_name =~ "Digilent Zybo 210279A79095A"} -index 0
ps7_init
ps7_post_config
----------------End of Script----------------

08:16:23 INFO    : Memory regions updated for context APU
08:18:17 INFO    : Disconnected from the channel tcfchan#3.
08:18:18 INFO    : System reset is completed.
08:18:20 INFO    : FPGA configured successfully with bitstream "C:/____test/Hello_World15p1/Hello_World15p1.sdk/Hello_World15p1_wrapper_hw_platform_0/Hello_World15p1_wrapper.bit"
08:18:22 INFO    : ps7_init is completed.
08:18:22 INFO    : ps7_post_config is completed.
 

>>>>>>>>> Vivado DRC report shows 1 violation ...

 

An IO Bus FIXED_IO_mio[53:0] with more than one IO standard is found. Components associated with this bus are: FIXED_IO_mio[53:16] of IOStandard LVCMOS18; 

 

>>>>> Board Rev is 'B', as in 'PB200-279 Rev B', 2013 

 

 

>>>> Okay , Just tried EEEEVrything---Vivado 2015.1, Vivado 2018.2, now Vivado 2017.4(I bought my Zybo B3 and installed 2017.4)  Diligent can you comment as in I should have avoided Zybo 1st gen B3 and bought instead (2nd or 3rd gen) ?  NO ERRORS, JUST THE uart1 Hello World prints nothing, JTAG jumper setting on JP5(while on JP5 setting=QSP1, the terminal prints nicely. Tells me my host computer is not blocking UART1) I see all other Hello World 'solutions' are never consistent--I've review so many on different years/Vivado Revs, so A Diligent comment tat is a consistent debug on their side I feel is warranted---no just 'read the manual', or 'check board file revs'---this HelloWorld on just PS is so barebones it glaring when NO ERRORS, and a glaringly quiet terminal

 

 

Ok it works now(Yes, I did take knock out the IOStandard LVCMOS18 DRC, setting correct IOStandard via XDC but do change in problem), but after unnecessary, adhoc hacking--I have not seen this solution in forums before and it was my last try after despair at spending $ on my Zybo: I will not state my solution, because it was a hack after much wasted time: Diligent may know my solution(it being quite simple) and has not made it known despite being very simple, whereas I have seen many other solves/failed attempts that are so much all over the place. I did rinse and repeat my solve does ensure its repeatable....

 

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Ok it works now, but after unnecessary, adhoc hacking--I have not seen this solution and it was my last try after despair at spending $ on my Zybo: I will not say how because it was a hack after much wasted time: Diligent may know the answer and has not made it clear and simple. I will rinse and repeat my solve to ensure its repeatable....

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Hi @ZyboB3,

Digilent staff don't tend to check the forum on the weekends, hence the delay. We found and corrected the issue you were running into; the latest board file for the Zybo (B4) identified itself as B3, and the preset.xml for B3 does not correctly instantiate UART materials. We updated the board files (https://github.com/Digilent/vivado-boards) so that they now correctly use Zybo B4 as the default (latest) version for the Zybo, which does correctly set up the UART correctly, so I would recommend downloading the board files again and replacing the existing Zybo board file folder with the new version. Make sure you restart Vivado so that it correctly detects the changes.

I tested and confirmed this on both 2015.1 and 2019.2, though I would recommend that you use 2017.4 or newer. The reason for this is because in older versions (at least the ones I tested from 2015.1 through 2016.4) UART and other MIO material is not enabled by default (though it is configured correctly if you check the box to enable it). I asked another engineer more familiar with the board files about this and they suspect that Xilinx probably changed the enable command which we now presently use in our board files and it isn't backwards compatible with older versions of Vivado.

Let me know if you have any questions about this.

Thanks,
JColvin

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I think I may be having this problem as well, although I am running Exercise 4.A out of the Zynq book, and LEDs are supposed to be lighting as well.

First, how do I figure out which version of the old Zybo board I have? I was pretty sure B.3, but is there anyway to verify?  (The back of my board just says "Rev B".)

Second, I used this board successfully in the past with Vivado 2016.4 under Windows XP, but now that I've upgraded to Windows 10 (and reinstalled the Xilinx tools, I haven't been successful with the SDK portion of the tools.  (Just programming the PL from Vivado works fine.)

When I run the SDK, everything seems to be fine: drivers are there, the processor is running, the FPGA is programmed, but my applications doesn't seem to be running. I think the processor may be stuck in some sort of boot code (ps7_init?).

Any ideas?

Jim

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Hi @jfrenzel,

You can just use the B4 version of the board files; the sub-versions that exist (such as B3 and B4) are for changes that do not affect the end usage of the hardware. This can be changes such as a silkscreen label, capacitor value in the power supply circuitry, change of one component to an equivalent one; changes that will not affect the Vivado usage. Major revisions that will affect the Vivado usage will have a letter change (such as B to C).

It could very well be that you are running into the same problem that was described here; most of the Digilent staff use the Zybo Z7-10 rather than the original Zybo since that was intended (at least as far as I am aware) to be the functional replacement and the new hardware that the support and materials creation staff was to be working with. It's hard to know for sure though; it depends what you are program you are attempting to run.

Thanks,
JColvin

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