I plan to design my own peripheral board attach to Eclypse Z7 with SYZYGY connector. And I am trying to generate the LVDS output through SYZYGY connector. As far as I know, all 7-series Xilinx FPGAs only support LVDS_25 I/O standard, which means the 2.5V bank VCCO is required. Moreover, I found the bank VCCO of SYZYGY connector could be select(1.2V-3.3V) by using SmartVIO Controller.
So my question is:
Eclypse Z7 is compatible with LVDS output, am I right?
If so, the only way to control and change the bank supplies is communicate with Eclypse PMCU by Digilent Eclypse Utility on Linux system, is that true? Because I am running Vivado on windows system and it takes time for me to explore how it works.
Question
Charlie.Li
Hi there,
I plan to design my own peripheral board attach to Eclypse Z7 with SYZYGY connector. And I am trying to generate the LVDS output through SYZYGY connector. As far as I know, all 7-series Xilinx FPGAs only support LVDS_25 I/O standard, which means the 2.5V bank VCCO is required. Moreover, I found the bank VCCO of SYZYGY connector could be select(1.2V-3.3V) by using SmartVIO Controller.
So my question is:
Thanks,
Charlie
Link to comment
Share on other sites
10 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.