sungsik Posted March 4, 2020 Share Posted March 4, 2020 Hi. I'm using zynq board. I'm a beginner. In my design, I used aurora8b10b IP (with framing mode) . It has AXI_ tdata, tkeep ,tlast,tvalid port. I controlled these signal in my custom logic. What I want to do is reading a frame data from aurora on the PS side. When I see the axi stream fifo, I have similar ports. Can I use this? Or should we use DMA? Please tell me the proper way. thanks Link to comment Share on other sites More sharing options...
D@n Posted March 4, 2020 Share Posted March 4, 2020 @sungsik, Xilinx makes an AXI S2MM data mover IP for this purpose. Feel free to check it out, Dan Link to comment Share on other sites More sharing options...
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sungsik
Hi. I'm using zynq board. I'm a beginner.
In my design, I used aurora8b10b IP (with framing mode) . It has AXI_ tdata, tkeep ,tlast,tvalid port.
I controlled these signal in my custom logic.
What I want to do is reading a frame data from aurora on the PS side.
When I see the axi stream fifo, I have similar ports. Can I use this? Or should we use DMA?
Please tell me the proper way.
thanks
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