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BSP and constraints


Edocecrous

Question

Hi,

I have an Arty A7 and using Vivado/Vitis 2019.2, installed BSP, and based on 'Arty - Getting Started with Microblaze', created my design, but added an I2C IP (besides the UART).
In Vitis chose the example that tests the IP-s in the project. I got the I2C self test reporting success on UART to the serial console on the PC.

The project didn't use constraints, there was no mention in the tutorial either. So my question is this: Where would i connect my external I2C device? And if i need to set it in constraints, how come the UART works 'out of the box' ?

All advice appreciated!
 

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After poking around, i issued TCL command: write_xdc -file I2Cconst.xdc,
and it generated a super xdc, and when searching through it i found this section:

####################################################################################
# Constraints from file : 'I2COled_axi_iic_0_0_board.xdc'
####################################################################################

#--------------------Physical Constraints-----------------

current_instance -quiet
set_property BOARD_PART_PIN i2c_scl_i [get_ports i2c_scl_io]
set_property IOSTANDARD LVCMOS33 [get_ports i2c_scl_io]
set_property PACKAGE_PIN L18 [get_ports i2c_scl_io]
set_property BOARD_PART_PIN i2c_sda_i [get_ports i2c_sda_io]
set_property IOSTANDARD LVCMOS33 [get_ports i2c_sda_io]
set_property PACKAGE_PIN M18 [get_ports i2c_sda_io]

So then the PACKAGE_PIN L18 is my clock, and PACKAGE_PIN M18 is my data. Right?

So now my question, how does the 'standard' user constraints get used? If i'd define this stuff in the constraints section, would this prevail or that?

Oki, found that too (more or less):

If multiple physical constraints are conflicting, the latest constraint wins. For example, if an I/O port gets assigned a different location (LOC) through multiple XDC files, the latest location assigned to the port takes precedence

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