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IBERT Design Creation on the Genesys 2



I am working on implementing the IBERT IP core on the Genesys2 dev board. I have purchased this daughter board to connect to the FMC, but I am unsure of how the pins relate to the SMA connectors. Has anyone used this daughter board before? I have emailed Hitech Global for documentation, but I have not received a response as of yet.

Also, does anyone know if a guide such as this one exists for the Genesys2 board? I assume that the steps would be very similar since they both use the Kintex-7 FPGA.


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I'm not sure what your goals are but it just so happens that the Genesys2 mDP in and out ports make for an excellent way to use it's transceivers. I posted  the transceiver bootcamp project in the Project Vault quite a while ago recounting how I implemented a 4-lane 10+ Gbps loop back Aurora interface. Some of the commentary is no longer valid and it might not be any help but reading it won't waste too much of your time. The Aurora required using a FMC-DEBUG 105 board because I needed one more external external clock than the Genesys2 provides. If nothing else the comments might be of interest.

Below is a link to the project:


It just so happens that I'm working on a similar project for the Numato Labs Mimas A7 which has a similar mDP design. So far this board has proven to be very useful as a general purpose FPGA prototype platform and is not at all expensive.

As you now realize that support is a very important part of value when purchasing this type of hardware.


Edited by zygot

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