Nexys video HDMI in / out XDC

[Ruskuls]

Hi,

I have question regarding dvi2rgb / rgb2dvi digilent IP cores.

Do I need to constraint input and output delay for HDMI pins?

I suppoes it must be done, because this feature is not implemented in HDMI RX / TX IP's.

Can anyone assist me during this process?

Current settings for HDMI RX. Input clock 160MHz

##HDMI RX Clock Signal
create_clock -period 6.25 -waveform {0.00 5.00} [get_ports hdmi_rx_clk_p]

#Delays
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -clock_fall -min -add_delay 0.5 [get_ports {hdmi_rx_data_n[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -clock_fall -max -add_delay 0.7 [get_ports {hdmi_rx_data_n[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -min -add_delay 0.7 [get_ports {hdmi_rx_data_n[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -max -add_delay 0.8 [get_ports {hdmi_rx_data_n[*]}]

set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -clock_fall -min -add_delay 0.5 [get_ports {hdmi_rx_data_p[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -clock_fall -max -add_delay 0.7 [get_ports {hdmi_rx_data_p[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -min -add_delay 0.7 [get_ports {hdmi_rx_data_p[*]}]
set_input_delay -clock [get_clocks {CLK_OUT_5x_hdmi_clk}] -max -add_delay 0.8 [get_ports {hdmi_rx_data_p[*]}]

 

Thanks in advance

Rinalds

[elodg]

We usually don't constrain HDMI Sink because inter-pair skew is eliminated during the sync process when link is established. The standard however does limit the skew, but since it is relatively relaxed and the channel alignment is capable of eliminating more than the limit, constraints are not needed.

Relevant section in the standard:

Table 4-27

Max Allowable Inter-Pair Skew at Sink Connector = 0.2 Tchar + 1.78ns.