Pmod OledRGB

[MoGamaal]

I think my question is general but i want to know how to initialize Pmod OledRGB using case when-statment i found some vhdl codes using this method but i cant understand it

[JColvin]

Hi @MoGamaal,

We don't have any VHDL code, but we have both a quick start sequence verbally written out in it's Reference Manual, https://reference.digilentinc.com/reference/pmod/pmodoledrgb/reference-manual#quick_data_acquisition, as well as an IP core for the Pmod OLEDrgb here: https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/pmodOLEDrgb_v1_0.

Let me know if you have any questions about this.

Thanks,
JColvin

[n3rdx]

On 2/13/2020 at 7:14 PM, JColvin said:

Hi @MoGamaal,

We don't have any VHDL code, but we have both a quick start sequence verbally written out in it's Reference Manual, https://reference.digilentinc.com/reference/pmod/pmodoledrgb/reference-manual#quick_data_acquisition, as well as an IP core for the Pmod OLEDrgb here: https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/pmodOLEDrgb_v1_0.

Hi @JColvin

As a medium skilled hw developer I'm was getting better at Xilinx workflow and interrupts/GPIO/UARTs, and was looking forward to using the Digilent PMOD OLEDrgb module with a custom board that I had developed a Vivado board file for (Seeed Spartan Edge Accelerator, Spartan-7 chip) with a PMOD connector/adapter (using some of its I/O pins). I went through Vivado 2020.x > Vitis 2020.x  design workflow, and realized finally that the IP provided is actually locked down. During the synthesis process / implementation, I did see the warnings, but thought : well it passes checks and is progressing so what is the harm? Well, after many attempts I realize it's a no go situation. Is there a reasoning behind locking down the IP so it can only be used on Digilent designed boards? 

1. So, then I did read the quick data acquisition section you mentioned (I made it into a PDF, as the actual PDF linked on that page is only a 3 pager, and doesn't actually include this section). Perhaps others might find it useful! Can you provide some guidelines to adapt the source code of the IP package (c-language) to a custom board, (with an XSA hardware file exported from a Vivado block diagram) and could you kindly indicate the legal way to incorporate any (slightly) modified Digilient authored and copyrighted source code  into a merged application? 
2. Also: Will any of the PMODs work with Avnet's Minized at all? If not -- well then I will have to change out my intended dev platform. Got a whole bunch of the PMODs. But if they are locked down to Digilent hardware ... 

Any HW / SW dev tips on using existing PMODs with non-digilent  products ? 

N3RDX

Digilent PMOD OLEDrgb programming guide.pdf

[JColvin]

Hi @n3rdx,

The material that we have on our GitHub for the Digilent Vivado library (unless otherwise specified at the top of the material) is MIT licensed: https://github.com/Digilent/vivado-library/blob/master/License.txt. So yes, you can use our material in your own application.

In terms of changing the IP package, there are probably two critical warnings that you are encountering. One is a warning that the IP needs to be re-packaged with the new version of Vivado; you can get the current working branch for Pmods for Vivado 2020.1 from this development branch (no formal release yet) here: https://github.com/Digilent/vivado-library/tree/feature/pmod_update. The other critical warning would be that the subcore XCI files were last packaged with a different board than the one being used, but that is safely ignored.

In terms of getting Pmods to work on the Minized, the main thing that the Pmod interfaces would be need to be added to the board file so that Pmod IPs can be readily added. Otherwise, Pmods communicate over some sort of standard communication protocol like SPI or I2C, so it is always possible to "bit-bang" out the needed communication.

Let me know if you have any questions about this.

Thanks,
JColvin

[n3rdx]

3 hours ago, JColvin said:

In terms of changing the IP package, there are probably two critical warnings that you are encountering. One is a warning that the IP needs to be re-packaged with the new version of Vivado; you can get the current working branch for Pmods for Vivado 2020.1 from this development branch (no formal release yet) here: https://github.com/Digilent/vivado-library/tree/feature/pmod_update. The other critical warning would be that the subcore XCI files were last packaged with a different board than the one being used, but that is safely ignored.

If I am understanding you correctly,  if I used the 2020.1 library IP, there may be a chance that the build process might succeed. My workflow is: Vivado 2020 > Bitstream > XSA hardware definition export > VITIS 2020 > Platform (from XSA) Standalone uBlaze > Application (C/C++) > executable. That is what I have been doing for a while, but this last design cycle got stuck as stated. I am generating bitstream at the moment (with 2020.1 IP libraries) and will report when I pass (or not) the VITIS  compilation stage. 

3 hours ago, JColvin said:

In terms of getting Pmods to work on the Minized, the main thing that the Pmod interfaces would be need to be added to the board file so that Pmod IPs can be readily added. Otherwise, Pmods communicate over some sort of standard communication protocol like SPI or I2C, so it is always possible to "bit-bang" out the needed communication.

I have craeted a custom board.xml, pins.xml, preset.xml for the FPGA development board. I was able to  define a "JA" connector following the (component, interface, connections) tuple of XML tags, comprised out of 8 individual pins directly connected to the FPGA - and assigned real LOC data for each of them. I was able to generate a JA connector and pull that into a block design. What I am not sure is the number of pins to reserve for all PMOD like connections. Are PMOD connectors 1x6, 2x6, and 2x4? If so, then in your Digilent CMOD  S7, from where I cloned the JA connector, what is the rationale for using 1,2,3,4 and 7,8,9,10? Are there differences in the Jx series of pin-outs ? (Maybe this is a different question than the current topic) but I have a bunch of PMOD modules I am looking at right now.

Thanks for your time.

 

oledrgb2.pdf

[n3rdx]

@JColvin if I may, here is an update. I couldn't get VITIS to compile the generated XSA from VIVADO 2020.1.  Review requested. I am appending the XSA file generated from my Vivado, if you would like to test it. 

1. XSA file attached for test - it is generated from the oledrgb2 block design. There is no special IP,  only basic building blocks.
2. Ugly screenshot that shows the platform needs to be added to the custom repository when you initially load it. 
3. After compilation failed, screenshot of the errors (why so many?)
4. After compilation failed, screengrab of the VITIS log (see RED text)

I am wondering if I deleted the v2020.1 pmod oledrgb IP and regenerated the XSA file, and then tried to compile the Hello World application (that was all I was trying to do), it should succeed. If it didn't take 1 hour to do the earlier iteration, I would do it now. Could you confirm that with me or does it work for you - and if so, how? 

Ideas?

oledrgb2_wrapper.xsa

[n3rdx]

17 hours ago, n3rdx said:

@JColvin if I may, here is an update. I couldn't get VITIS to compile the generated XSA from VIVADO 2020.1.

oledrgb2_wrapper.xsa 335.01 kB · 1 download

@JColvin  and any Digilent team member, in trying to locate the source of the problem described above,  just tried to regenerate the bsp by going to VITIS 2020.1, and then in the Platform definition, "Reset BSP Sources", which took a little bit of time to regenerate the BSP. Then I tried to 'make' only the Platform - and found a (possibly Digilent specific or related) set of errors in the code:

"Compiling PmodOLEDrgb..."

PmodOLEDrgb_selftest.c: In function 'PMODOLEDRGB_Reg_SelfTest':
PmodOLEDrgb_selftest.c:52:60: warning: comparison of integer expressions of different signedness: 'u32' {aka 'long unsigned int'} and 'int' [-Wsign-compare]
   52 |    if ( PMODOLEDRGB_mReadReg (baseaddr, read_loop_index*4) != (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
      |                                                            ^~
PmodOLEDrgb_selftest.c:36:6: warning: unused variable 'Index' [-Wunused-variable]
   36 |  int Index;
      |      ^~~~~
mb-ar: *.o: Invalid argument
make[1]: *** [Makefile:19: libs] Error 1
make: *** [Makefile:30: microblaze_0/libsrc/PmodOLEDrgb_v1_0/src/make.libs] Error 2
Failed to build  the bsp sources for domain - domain_microblaze_0
Failed to generate the platform.

Suggestions? I can of course omit this program from my build, but would that help? What is causing the errors? 

[JColvin]

Hi @n3rdx,

I'll see if I can get a design made, though know that none of us at Digilent have worked with or have a MiniZed from Avnet so we won't be able to do any hardware tests. Could you provide a screenshot of your block design? It sounds like you're adding a microblaze design which I wouldn't recommend doing if you are already using a Zynq based board.

In terms of the numbering scheme for Pmods, Pmod ports are designed with with 12 pins with the first four pins on the top row (1-4) being data pins, pins 5 and 6 being ground and Vcc pins, respectively, then pins 7-10 on the bottom row which are physically directly below pins 1-4, followed by pins 11 & 12 which is a second pair of ground and Vcc pins.

Thanks,
JColvin

[n3rdx]

@jcolvin, I am using a SEEED Spartan Edge Accelerator Spartan-7 s15 FPGA board (Wiki Page. )I am not currently testing on MiniZED, but I will do so, I have it in stock. For now, all work is done on this one basic board which was cheap ($35 ea.). It can be used as an Arduino shield, or as a standalone FPGA board. 

 I am using the board in FPGA standalone mode (programming directly with  JTAG cable. I can do JTAG, and JTAG-USB serial). I am attaching version 2.41 of the board files which contain VIVADO defintions for FPGA, AXI UART, AXI GPIO PMOD JA, LEDs - essentially a base platform for 'standalone' microblaze (microcontroller preset, with interrupts) development. 

The board files for the product (board.xml, preset.xml, part0.xml and the oledrgb2.pdf are created by me, with adaptation from others) is attached if you would like to experiment. I believe the issue that I first discovered (cannot compile using VITIS) is due to in part the faults I have identified above (the post with "Compiling PmodOLEDrgb") - could you please review. 

3 hours ago, n3rdx said:

 

"Compiling PmodOLEDrgb..."

PmodOLEDrgb_selftest.c: In function 'PMODOLEDRGB_Reg_SelfTest':
PmodOLEDrgb_selftest.c:52:60: warning: comparison of integer expressions of different signedness: 'u32' {aka 'long unsigned int'} and 'int' [-Wsign-compare]
   52 |    if ( PMODOLEDRGB_mReadReg (baseaddr, read_loop_index*4) != (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
      |                                                            ^~
PmodOLEDrgb_selftest.c:36:6: warning: unused variable 'Index' [-Wunused-variable]
   36 |  int Index;
      |      ^~~~~
mb-ar: *.o: Invalid argument
make[1]: *** [Makefile:19: libs] Error 1
make: *** [Makefile:30: microblaze_0/libsrc/PmodOLEDrgb_v1_0/src/make.libs] Error 2
Failed to build  the bsp sources for domain - domain_microblaze_0
Failed to generate the platform.

Suggestions? I can of course omit this program from my build, but would that help? What is causing the errors? 

n3rdx

preset.xml board.xml part0_pins.xml oledrgb2.pdf

[n3rdx]

supplementary: I opened up VITIS Shell and inspected the Make file at the bsp top level. See below. Is it possible there is some sort of bug in the PmodOLEDrgb package? 

The following is the output of "make -n" (just see what the make process should look like). See below for the actual result. 

C:\Users\Eva\ttllc_xilinx_projects\vitis\v_test\p_test\microblaze_0\standalone_domain\bsp>make -n
echo "Running Make include in microblaze_0/libsrc/bram_v4_4/src"
make -C microblaze_0/libsrc/bram_v4_4/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make include in microblaze_0/libsrc/cpu_v2_11/src"
make -C microblaze_0/libsrc/cpu_v2_11/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make include in microblaze_0/libsrc/gpio_v4_6/src"
make -C microblaze_0/libsrc/gpio_v4_6/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make include in microblaze_0/libsrc/intc_v3_11/src"
make -C microblaze_0/libsrc/intc_v3_11/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make include in microblaze_0/libsrc/PmodOLEDrgb_v1_0/src"
make -C microblaze_0/libsrc/PmodOLEDrgb_v1_0/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make include in microblaze_0/libsrc/standalone_v7_2/src"
make -C microblaze_0/libsrc/standalone_v7_2/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
make -C profile COMPILER_FLAGS="-O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" EXTRA_COMPILER_FLAGS="-g -ffunction-sections -fdata-sections -Wall -Wextra" COMPILER="mb-gcc" ARCHIVER="mb-ar" AS="mb-as" include
cp -rf profile.h mblaze_nt_types.h _profile_timer_hw.h ../../../../include
echo "Running Make include in microblaze_0/libsrc/uartlite_v3_4/src"
make -C microblaze_0/libsrc/uartlite_v3_4/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
cp *.h ../../../include
echo "Running Make libs in microblaze_0/libsrc/bram_v4_4/src"
make -C microblaze_0/libsrc/bram_v4_4/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling bram"
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xbram_g.o xbram_g.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xbram.o xbram.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xbram_sinit.o xbram_sinit.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xbram_selftest.o xbram_selftest.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xbram_intr.o xbram_intr.c
mb-ar -r ../../../lib/libxil.a xbram_g.o xbram.o xbram_sinit.o xbram_selftest.o xbram_intr.o
rm -rf xbram_g.o xbram.o xbram_sinit.o xbram_selftest.o xbram_intr.o
echo "Running Make libs in microblaze_0/libsrc/cpu_v2_11/src"
make -C microblaze_0/libsrc/cpu_v2_11/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling cpu"
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xio.o xio.c
mb-ar -r ../../../lib/libxil.a xio.o
rm -rf xio.o
echo "Running Make libs in microblaze_0/libsrc/gpio_v4_6/src"
make -C microblaze_0/libsrc/gpio_v4_6/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling gpio"
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio_g.o xgpio_g.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio.o xgpio.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio_sinit.o xgpio_sinit.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio_selftest.o xgpio_selftest.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio_extra.o xgpio_extra.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xgpio_intr.o xgpio_intr.c
mb-ar -r ../../../lib/libxil.a xgpio_g.o xgpio.o xgpio_sinit.o xgpio_selftest.o xgpio_extra.o xgpio_intr.o
rm -rf xgpio_g.o xgpio.o xgpio_sinit.o xgpio_selftest.o xgpio_extra.o xgpio_intr.o
echo "Running Make libs in microblaze_0/libsrc/intc_v3_11/src"
make -C microblaze_0/libsrc/intc_v3_11/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling intc"
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc_intr.o xintc_intr.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc_g.o xintc_g.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc_options.o xintc_options.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc_l.o xintc_l.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc.o xintc.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xintc_selftest.o xintc_selftest.c
mb-ar -r ../../../lib/libxil.a xintc_intr.o xintc_g.o xintc_options.o xintc_l.o xintc.o xintc_selftest.o
rm -rf xintc_intr.o xintc_g.o xintc_options.o xintc_l.o xintc.o xintc_selftest.o
echo "Running Make libs in microblaze_0/libsrc/PmodOLEDrgb_v1_0/src"
make -C microblaze_0/libsrc/PmodOLEDrgb_v1_0/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling PmodOLEDrgb..."
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include *.c
mb-ar -r ../../../lib/libxil.a *.o
make clean
echo "Running Make libs in microblaze_0/libsrc/standalone_v7_2/src"
make -C microblaze_0/libsrc/standalone_v7_2/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling standalone";
mb-gcc  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare  -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include xil_util.c microblaze_interrupts_g.c inbyte.c microblaze_exception_handler.c pvr.c errno.c microblaze_interrupt_handler.c xil_testcache.c xil_exception.c xil_testmem.c xil_clocking.c xil_assert.c outbyte.c xil_sleepcommon.c xil_printf.c xil_io.c xil_cache.c xil_mem.c xplatform_info.c fcntl.c xil_testio.c print.c _exit.c microblaze_sleep.c xil_misc_psreset_api.c microblaze_enable_exceptions.S microblaze_enable_dcache.S microblaze_invalidate_icache_range.S microblaze_flush_dcache_range.S microblaze_init_dcache_range.S microblaze_invalidate_dcache.S microblaze_disable_interrupts.S microblaze_disable_icache.S microblaze_invalidate_cache_ext_range.S microblaze_invalidate_dcache_range.S microblaze_flush_dcache.S microblaze_scrub.S microblaze_flush_cache_ext_range.S microblaze_update_dcache.S microblaze_enable_interrupts.S microblaze_enable_icache.S microblaze_init_icache_range.S microblaze_invalidate_icache.S microblaze_disable_dcache.S microblaze_disable_exceptions.S hw_exception_handler.S microblaze_update_icache.S microblaze_invalidate_cache_ext.S microblaze_flush_cache_ext.S
mb-ar -r ../../../lib/libxil.a xil_util.o print.o microblaze_interrupts_g.o xil_sleepcommon.o errno.o xil_testcache.o xil_testmem.o xil_clocking.o xil_assert.o xplatform_info.o xil_mem.o xil_cache.o inbyte.o microblaze_exception_handler.o pvr.o microblaze_interrupt_handler.o fcntl.o xil_printf.o xil_io.o _exit.o xil_testio.o xil_misc_psreset_api.o outbyte.o microblaze_sleep.o xil_exception.o microblaze_enable_exceptions.o microblaze_invalidate_cache_ext.o microblaze_enable_dcache.o microblaze_invalidate_icache_range.o microblaze_init_dcache_range.o microblaze_enable_interrupts.o microblaze_enable_icache.o microblaze_update_icache.o microblaze_init_icache_range.o microblaze_disable_exceptions.o microblaze_disable_dcache.o microblaze_invalidate_icache.o microblaze_flush_dcache_range.o microblaze_invalidate_cache_ext_range.o microblaze_flush_cache_ext.o microblaze_invalidate_dcache.o microblaze_disable_interrupts.o microblaze_disable_icache.o microblaze_scrub.o microblaze_flush_cache_ext_range.o microblaze_flush_dcache.o microblaze_invalidate_dcache_range.o hw_exception_handler.o microblaze_update_dcache.o
rm -rf xil_util.o print.o microblaze_interrupts_g.o xil_sleepcommon.o errno.o xil_testcache.o xil_testmem.o xil_clocking.o xil_assert.o xplatform_info.o xil_mem.o xil_cache.o inbyte.o microblaze_exception_handler.o pvr.o microblaze_interrupt_handler.o fcntl.o xil_printf.o xil_io.o _exit.o xil_testio.o xil_misc_psreset_api.o outbyte.o microblaze_sleep.o xil_exception.o
rm -rf microblaze_enable_exceptions.o microblaze_invalidate_cache_ext.o microblaze_enable_dcache.o microblaze_invalidate_icache_range.o microblaze_init_dcache_range.o microblaze_enable_interrupts.o microblaze_enable_icache.o microblaze_update_icache.o microblaze_init_icache_range.o microblaze_disable_exceptions.o microblaze_disable_dcache.o microblaze_invalidate_icache.o microblaze_flush_dcache_range.o microblaze_invalidate_cache_ext_range.o microblaze_flush_cache_ext.o microblaze_invalidate_dcache.o microblaze_disable_interrupts.o microblaze_disable_icache.o microblaze_scrub.o microblaze_flush_cache_ext_range.o microblaze_flush_dcache.o microblaze_invalidate_dcache_range.o hw_exception_handler.o microblaze_update_dcache.o
make -C profile COMPILER_FLAGS="-O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" EXTRA_COMPILER_FLAGS="-g -ffunction-sections -fdata-sections -Wall -Wextra" COMPILER="mb-gcc" ARCHIVER="mb-ar" AS="mb-as" clean
rm -f _profile_init.o _profile_clean.o _profile_timer_hw.o profile_hist.o profile_cg.o profile_mcount_mb.o libxil.a
echo "Running Make libs in microblaze_0/libsrc/uartlite_v3_4/src"
make -C microblaze_0/libsrc/uartlite_v3_4/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
echo "Compiling uartlite"
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_selftest.o xuartlite_selftest.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_intr.o xuartlite_intr.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_stats.o xuartlite_stats.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_g.o xuartlite_g.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_l.o xuartlite_l.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite.o xuartlite.c
mb-gcc -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare -g -ffunction-sections -fdata-sections -Wall -Wextra -I./. -I../../../include -o xuartlite_sinit.o xuartlite_sinit.c
mb-ar -r ../../../lib/libxil.a xuartlite_selftest.o xuartlite_intr.o xuartlite_stats.o xuartlite_g.o xuartlite_l.o xuartlite.o xuartlite_sinit.o
rm -rf xuartlite_selftest.o xuartlite_intr.o xuartlite_stats.o xuartlite_g.o xuartlite_l.o xuartlite.o xuartlite_sinit.o
echo 'Finished building libraries'

Here is the  actual result. Are the warnings that critical and do they happen in your lab environment as well - so how are you dealing with it? 

C:\Users\Eva\ttllc_xilinx_projects\vitis\v_test\p_test\microblaze_0\standalone_domain\bsp>make
"Running Make include in microblaze_0/libsrc/bram_v4_4/src"
make -C microblaze_0/libsrc/bram_v4_4/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/cpu_v2_11/src"
make -C microblaze_0/libsrc/cpu_v2_11/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/gpio_v4_6/src"
make -C microblaze_0/libsrc/gpio_v4_6/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/intc_v3_11/src"
make -C microblaze_0/libsrc/intc_v3_11/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/PmodOLEDrgb_v1_0/src"
make -C microblaze_0/libsrc/PmodOLEDrgb_v1_0/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/standalone_v7_2/src"
make -C microblaze_0/libsrc/standalone_v7_2/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make include in microblaze_0/libsrc/uartlite_v3_4/src"
make -C microblaze_0/libsrc/uartlite_v3_4/src -s include  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Running Make libs in microblaze_0/libsrc/bram_v4_4/src"
make -C microblaze_0/libsrc/bram_v4_4/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Compiling bram"
"Running Make libs in microblaze_0/libsrc/cpu_v2_11/src"
make -C microblaze_0/libsrc/cpu_v2_11/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Compiling cpu"
"Running Make libs in microblaze_0/libsrc/gpio_v4_6/src"
make -C microblaze_0/libsrc/gpio_v4_6/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Compiling gpio"
"Running Make libs in microblaze_0/libsrc/intc_v3_11/src"
make -C microblaze_0/libsrc/intc_v3_11/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Compiling intc"
"Running Make libs in microblaze_0/libsrc/PmodOLEDrgb_v1_0/src"
make -C microblaze_0/libsrc/PmodOLEDrgb_v1_0/src -s libs  "SHELL=CMD" "COMPILER=mb-gcc" "ASSEMBLER=mb-as" "ARCHIVER=mb-ar" "COMPILER_FLAGS=  -O2 -c -mcpu=v11.0 -mlittle-endian -mno-xl-reorder -mno-xl-soft-mul -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra"
"Compiling PmodOLEDrgb..."
PmodOLEDrgb_selftest.c: In function 'PMODOLEDRGB_Reg_SelfTest':
PmodOLEDrgb_selftest.c:52:60: warning: comparison of integer expressions of different signedness: 'u32' {aka 'long unsigned int'} and  int' [-Wsign-compare]
   52 |    if ( PMODOLEDRGB_mReadReg (baseaddr, read_loop_index*4) != (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
      |                                                            ^~
PmodOLEDrgb_selftest.c:36:6: warning: unused variable 'Index' [-Wunused-variable]
   36 |  int Index;
      |      ^~~~~
mb-ar: *.o: Invalid argument
make[1]: *** [Makefile:19: libs] Error 1
make: *** [Makefile:30: microblaze_0/libsrc/PmodOLEDrgb_v1_0/src/make.libs] Error 2

C:\Users\Eva\ttllc_xilinx_projects\vitis\v_test\p_test\microblaze_0\standalone_domain\bsp>

 

[n3rdx]

@JColvin I think I have been able to figure it out and have only just now compiled "hello world" program and got UART output.

On Windows 10, VITIS 2020.1, I believe these three reasons caused the BSP build process shown earlier to fail:

1. an error in the Makefile in the Digilent package concerning 'mb-ar' execution
2. missing casts in the file PmodOLEDrgb_selftest.c
3. Unused variable.

Is there a process by which I can submit these edits? Once I fixed them, the library compiled to libxil.a , and the bsp package compilation proceeded as usual.

I immediately tested the example PmodOLEDrgb application (main.c, bitmap.h) and IT ALMOST COMPILED well, until:

23:20:23 **** Clean-only build of configuration Debug for project a_test ****
make clean 
rm -rf  ./src/helloworld.o ./src/platform.o  ./src/helloworld.d ./src/platform.d  a_test.elf.size  a_test.elf
' '

23:20:23 Build Finished (took 296ms)

23:20:23 **** Incremental Build of configuration Debug for project a_test ****
make all 
'Building file: ../src/main.c'
'Invoking: MicroBlaze gcc compiler'
mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -MT"src/main.o" -IC:/Users/Eva/ttllc_xilinx_projects/vitis/v_test/p_test/export/p_test/sw/p_test/standalone_domain/bspinclude/include -mno-xl-reorder -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v11.0 -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/main.d" -MT"src/main.o" -o "src/main.o" "../src/main.c"
'Finished building: ../src/main.c'
' '
'Building file: ../src/platform.c'
'Invoking: MicroBlaze gcc compiler'
mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -MT"src/platform.o" -IC:/Users/Eva/ttllc_xilinx_projects/vitis/v_test/p_test/export/p_test/sw/p_test/standalone_domain/bspinclude/include -mno-xl-reorder -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v11.0 -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/platform.d" -MT"src/platform.o" -o "src/platform.o" "../src/platform.c"
'Finished building: ../src/platform.c'
' '
'Building target: a_test.elf'
'Invoking: MicroBlaze gcc linker'
mb-gcc -Wl,-T -Wl,../src/lscript.ld -LC:/Users/Eva/ttllc_xilinx_projects/vitis/v_test/p_test/export/p_test/sw/p_test/standalone_domain/bsplib/lib -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v11.0 -mno-xl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "a_test.elf"  ./src/main.o ./src/platform.o   -Wl,--start-group,-lxil,-lgcc,-lc,--end-group
c:/xilinx/vitis/2020.1/gnu/microblaze/nt/x86_64-oesdk-mingw32/usr/bin/microblaze-xilinx-elf/../../libexec/microblaze-xilinx-elf/gcc/microblaze-xilinx-elf/9.2.0/real-ld.exe: a_test.elf section `.rodata' will not fit in region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem'
c:/xilinx/vitis/2020.1/gnu/microblaze/nt/x86_64-oesdk-mingw32/usr/bin/microblaze-xilinx-elf/../../libexec/microblaze-xilinx-elf/gcc/microblaze-xilinx-elf/9.2.0/real-ld.exe: region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' overflowed by 15840 bytes
collect2.exe: error: ld returned 1 exit status
'Finished building target: a_test.elf'
' '
'Invoking: MicroBlaze Print Size'
mb-size a_test.elf  |tee "a_test.elf.size"
mb-size: 'a_test.elf': No such file
'Finished building: a_test.elf.size'
' '

Using a Microblaze, Microcontroller preset, with interrupts, what are the recommended memory sizes for the demo program? 

 

[JColvin]

Hi @n3rdx,

The typecasting complaint and the complaint of the unused variables with regards to the OLEDrgb SelfTest an be ignored (or at least we have consistently ignored them for the last few updates with no detriment).

I don't have a SEEED Studio S7, but I created a couple of Microblaze projects for the Pmod OLEDrgb on one of Digilent's S7 boards (one using the on board DDR, one ignoring the DDR) and neither project encountered the *.o error; I cleaned and rebuilt the project multiple times to test this.

I asked the engineer who's been running the updates and they let me know that have occasionally been getting that error and been doing the following:

convert the OUTS variable of the makefile from using a *.o pattern to using addsuffix, basename, and wildcard function calls, which list out the object files that are output by the compiler on a C-source by C-source basis, instead of just finding any .o files in the working directory.
I.e. replace OUTS=*.o with OBJECTS= $(addsuffix .o, $(basename $(wildcard *.c))) in the driver's makefile down in the BSP libsrc folder. They also broke the COMPILER call out of the libs rule and placed it in a %.o: %.c rule. I attached the makefile for the OLEDrgb in case you wanted to compare it to your own.

Otherwise, they have been seeing similar issues and are working to resolve them. The file causing the bugs is typically placed at <platform>/microblaze_0/domain_microblaze_0/bsp/microblaze_0/libsrc/<pmod>/src/Makefile.

For both of my Microblaze applications (I only used USB UART and the Pmod OLEDrgb IP cores as "extra" pieces of the Microblaze design) with 32 kB dedicated to the local memory of the Microblaze processor for both the DDR and non-DDR variants (16 kB cache for the the build with DDR) didn't use a lot of memory; the values that I have in my .elf.size file for the non-DDR variant is as follows:
  text       data        bss        dec        hex           filename
20300     324       3480     24104    5e28    rgb-s725-noDDR.elf

Thanks,
JColvin

 

Makefile

[n3rdx]

yes, I just am in the first stages of testing ! with the home-brew JA adapter, Microblaze (32 KB, SPI, UART, I2C, OLEDrgb). The short answer: it didn't work on the first try. The longish answer, using an external logic analyzer, I see the board producing signals - from the running OLEDrgb sample program. I will have to study how to setup a live logic analyzer section (to see if the pins I chose are wrong, or crossed) or learn how to use the ILA for the system to be able to debug. 

 

The solution after generating XSA to VITIS is to load the XSA, to create new platform. Edit the driver source code for (1) Makefile (2) PmodOLEDrgb_selftest.c

 

LIBSOURCES=*.c
OUTS = *.o
OBJECTS =	$(addsuffix .o, $(basename $(wildcard *.c)))

libs:
	echo "Compiling PmodOLEDrgb..."
	$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
	$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
	make clean

and

XStatus PMODOLEDRGB_Reg_SelfTest(void * baseaddr_p)
{
	u32 baseaddr;
	u32 write_loop_index;
	u32 read_loop_index;
	//int Index;

	baseaddr = (u32) baseaddr_p;

	xil_printf("******************************\n\r");
	xil_printf("* User Peripheral Self Test\n\r");
	xil_printf("******************************\n\n\r");

	/*
	 * Write to user logic slave module register(s) and read back
	 */
	xil_printf("User logic slave module test...\n\r");

	for (write_loop_index = 0 ; write_loop_index < 4; write_loop_index++)
	  PMODOLEDRGB_mWriteReg (baseaddr, write_loop_index*4, (write_loop_index+1)*READ_WRITE_MUL_FACTOR);
	for (read_loop_index = 0 ; read_loop_index < 4; read_loop_index++)
	  if ( PMODOLEDRGB_mReadReg (baseaddr, read_loop_index*4) != (u32) (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
	    xil_printf ("Error reading register value at address %x\n", (int)baseaddr + read_loop_index*4);
	    return XST_FAILURE;

 

I was hoping to see at least a flicker of life when I connected the module, but I may (possibility low,  but it is there) have cross connected the pins somewhere in the 6x2 to 2 x (6x1) cable adapter that I had to use for the connections to a pin headers. Perhaps a manual troubleshooting exercise will be needed. In the guide, which package in VITIS provides functions such as SpiWrite and others? 

[JColvin]

Hi @n3rdx,

Within the wrapper->hw->drivers->PmodOLEDrgb_v1_0->src->PmodOLEDrgb.c you can find it's functions that call the Xilinx SPI functions (OLEDrgb_SPIInit on line 1017, WriteSPICommand on 1063, and WriteSPI on 1086. The Xilinx SPI functions themselves are in xspi.c in the same structure path as PmodOLEDrgb.c.

For what it's worth, there is an example set of commands for what the Pmod OLEDrgb should do during start up; I don't know if the IP follows the commands in the same order, but it will at least let you know what bytes you would be looking for: https://reference.digilentinc.com/reference/pmod/pmodoledrgb/reference-manual#quick_data_acquisition.

Thanks,
JColvin

[n3rdx]

1 hour ago, JColvin said:

Hi @n3rdx,

Within the wrapper->hw->drivers->PmodOLEDrgb_v1_0->src->PmodOLEDrgb.c you can find it's functions that call the Xilinx SPI functions (OLEDrgb_SPIInit on line 1017, WriteSPICommand on 1063, and WriteSPI on 1086. The Xilinx SPI functions themselves are in xspi.c in the same structure path as PmodOLEDrgb.c.

For what it's worth, there is an example set of commands for what the Pmod OLEDrgb should do during start up; I don't know if the IP follows the commands in the same order, but it will at least let you know what bytes you would be looking for: https://reference.digilentinc.com/reference/pmod/pmodoledrgb/reference-manual#quick_data_acquisition.

Thanks,
JColvin

@JColvin I was able to get all kinks worked out. Thank you for your help. The board that I had thought supplied 3V3 to a particular external pin, had some extra features that required a separate MOSFET to switch on before that rail could be powered, which I thought would have been sufficient to power the OLED module. I hooked up an external logic analyzer and confirmed the SPI bus and Pmod control line activity first, and then realized the module was never getting appropriate power supply. A quick connection to an external 3V3 (actually, the VREF to the JTAG programmer worked for me, as there was a pass-through on the programmer) and it worked. Not liking Tommy's photo, I used the bitmaptoarray.py to convert a downscaled picture and had to figure out an efficient way to match the source picture Vertical and Horizontal pixels - the python script doesn't come with any notes. Found out that 24-bit, 96 H x 64 V format is the most appropriate. Then took the generated hex array and incorporated it into the bitmap.h in place of the original 'tommy' array. Result attached for proof. I noticed the fonts are pretty big, and unwieldy but ok for a test. Smaller fonts, anyone?  Hope the above information comes in handy for others. 

n3rdx

[JColvin]

Hi @n3rdx,

Nice! I'm glad you were able to get it up and running.

With regards to the smaller (and larger) font, that is less easy to do. There are two reasons for this. The first is visual with regards to resolution; the character library (CharFont0.h; the chips in the Pmod OLEDrgb do not have any built-in character libraries) has each of the ASCII characters fitting in their own 8x8 pixel arrangement, nicely fitting into the 96x64 pixel display of the OLEDrgb for corresponding 12 by 8 character blocks. Changing the character library so that individual ASCII characters are smaller is difficult to make sure they are still readily distinguishable (lowercase and uppercase 'K' would be an example of this as well as the gap in a lowercase 'e').

The second reason would be how the individual characters are each stored. After doing the sprite work to get the characters smaller (perhaps in a 6x6 pixel frame rather than an 8x8) for the CharFont0.h file, you would need to adjust the DrawGlyph and AdvanceCursor funtions, the OLEDCHAR_BYTES #define value, to properly handle the smaller number of bits. This is also possible to do, but not necessarily an afternoon task depending on how you want to change the functions to handle this.

Thanks,
JColvin