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zygot

Eclypse Z7 First Impressions

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First off the two ZMOD offerings by Digilent are well designed with uncommonly good documentation. Well done, and thanks for adding SYSYGY support. I would have preferred a non-ZYNQ platform... but.. The Eclypse Z7 with one ADC and one DAC ZMOD is a good value and sets itself apart from anything else in the Xilinx FPGA development board space. .

Software support is another matter. I realize the effort, due to your framework, is immense and hopefully not complete. It's just too complicated.  I spent almost a day before being able to build and run the Linux based demos for the ADC and DAC ZMODs. Started with a WIn10 Vivado installation and still haven't managed to build anything. It took a while but I did manage to build demo executables for the Linux based projects on Unbuntu 19.10 using the Vivado 2019.1 SDK. Admittedly, I'm not a ZYNQ expert but I can create a Vivado project using one of the available hardware interfaces, build a bitstream and a standalone application for any other Z7xxx board in about 30 minutes from scratch. My advice is to use a Linux host for Eclypse development.

It may be that I'll create a Linux application for the Eclypse/ZMOD one day, but I'll want to run the application from within Linux, not the SDK. Hopefully, the lack of an HDMI output won't be an issue. I'm hoping that you have a path envisioned to let users do that.

My expectation for getting started with this system was to use my normal flow by starting in Vivado, creating a bitstream supporting the SYZYGY ports and use the SDK to create an application. Normally, this is almost trivial. For any of the ZMODs this is impossible as things stand.

Will there be a process for creating a bare-metal standalone bitstream and application in the near future that remotely resembles the 'normal' Xilinx tools flow?

P.S. I can kinda understand the costs of providing a bootable SD card to run the pre-built demos but really... you couldn't afford to provide 8 screws to attach the ZMOD modules to the Exlypse Z7?

Edited by zygot

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Hi @zygot,

Thank you for your mostly positive feedback, its nice to see that one of or most active forum members likes the product.

While true that we have focused our documentation and subsequently our attention towards the Linux aspect of the project, we have not  neglected the desire (or potential desire) of our customers to do just use bare-metal applications and use the 'normal ' Xilinx flow. We tried to keep it as backwards compatible as possible, regarding our usual way of providing demos, while adding a new infrastructure for an OS application. In this sens we had to create the more or less complex zmodlib, which provides access to our Zmods from both the on board Linux environment as well as the opportunity to use them in bare-metal. If you open the SDK workspace which we provide, either trough the Eclypse-Z7 repo or the direct link of the Eclypse-Z7-SW repo, you will notice that there are projects in the workspace which are meant for bare-metal use. These showcase the same functionality as their Linux project counterpart and are basically the classic approach to doing our demos.

There were debates on how to provide the demos for this board in Linux, while some suggested just providing the .elf others suggested the source code with a make file in the rootfs. We settled on this approch using Xilinx SDK because it provides both the source code, the cross-compiler as well as a GUI for debugging the applications. Linux offers a big variety of ways in which applications can be debugged, compiled and run; our solution is not the most straight forward but it offers the benefit of having a familiar environment to develop a Linux application using the Eclypse Z7 and Zmods. It is possible to use Xilinx SDK on Windows to build and debug applications for the onboard Linux. As an alternative, if you just want to run the applications you can always build them on you PC and copy the .elf on to the onboard Linux and run it there. 

For petalinux development, which requires Linux use, I personally recommend using a Linux OS rather then a virtual machine as it will take longer  to build on a virtual machine. Like I mentioned before, although a Linux OS /virtual machine with Vivado 2019.1 is easier to use for Linux application development with the Eclypse Z7 and Zmods, it is not mandatory. The Xilinx SDK should work for Linux application development on both Windows and on Linux.

At the end of the day, this was a pretty exciting project for us to work on and we were focused on showcasing the new aspects of it while also providing our classic way of doing things... we just didn't explicitly document the former. 

Thank you again for the positive assessment,

-Ciprian

Edited by Cristian.Fatu

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@Ciprian,

Yes, I do like the product and think that it represents a positive expansion of your offerings that covers the needs of a larger audience.

At the moment my frustration is not being able to use your zmod IP to create my own custom hardware bitstream. Your latest vivado-library provides the controller IP for both but no connection to zmod ports. If there's full support for the normal board design flow I'm not finding it. 

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7 hours ago, Ciprian said:

It is possible to use Xilinx SDK on Windows to build and debug applications for the onboard Linux.

This statement might be true but I haven't been able to accomplish it. You might not realize that the SDK behaves differently on Windows than it does in Linux.

For WIN10 SDK I have not been able to get the SDK to link to the SYSROOT file system, which I believe is the reason why I couldn't create a Linux project build for either ZMOD demo. It took some doing but I did managed to do this running the SDK in Linux. The documentation on setting up zmod library builds is not quite correct in a number of places for either OS host.

I was able to connect the SDK to the Eclypse Z7 Ethernet port for debugging on both OSes.

Edited by zygot

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On 2/13/2020 at 3:53 PM, zygot said:

@Ciprian,

Yes, I do like the product and think that it represents a positive expansion of your offerings that covers the needs of a larger audience.

At the moment my frustration is not being able to use your zmod IP to create my own custom hardware bitstream. Your latest vivado-library provides the controller IP for both but no connection to zmod ports. If there's full support for the normal board design flow I'm not finding it. 

@zygot

Than you for pointing out this issue, there seams to be something we missed either in the git repo or failed to mention in our documentation. In order for easier version control for Xilinx IPs and to simplify some of our more complex IP system, the Zmod IPs are an example for this, we have been using the vivado-hierarchies which work with our IP repo and the Vivado IPs. If you use it to import any Zmod into you block design in Vivado it will create the same hierarchical block as in the example project. For more details on how to use it please visit here. Unfortunately the nature of the Zmod connector does not allow us to create a board-flow for it; this means that you  will have to connect the external ports to the xdc manually.

We will try correcting this issue as soon as possible and probably have a new release tag for the Eclypse-Z7-HW repo.

 

20 hours ago, zygot said:

This statement might be true but I haven't been able to accomplish it. You might not realize that the SDK behaves differently on Windows than it does in Linux.

For WIN10 SDK I have not been able to get the SDK to link to the SYSROOT file system, which I believe is the reason why I couldn't create a Linux project build for either ZMOD demo. It took some doing but I did managed to do this running the SDK in Linux. The documentation on setting up zmod library builds is not quite correct in a number of places for either OS host.

I was able to connect the SDK to the Eclypse Z7 Ethernet port for debugging on both OSes.

The fact that it did not work for you on Windows and that "the documentation on setting up zmod library builds is not quite correct in a number of places for either OS host" is troublesome. Could you please send me the changes that you have made so that we can look in to it and correct the potential issues?

Thanks,

-Ciprian

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44 minutes ago, Ciprian said:

Unfortunately the nature of the Zmod connector dose not allow us to create a board-flow for it; this means that you  will have to connect the external ports to the xdc manually.

Well, that and the fact that you provide no means to re-created the SW bitstream and associated export files that go with the SW demo code. I think that user's of this product line would expect to use the SYZYGY ports and pods interchangeably with other SYZYGY platforms and pods. This does touch the entire HW/SW framework for these kinds of platforms. At this point having the ZMOD controller IP available isn't sufficient to create a board design. I'm not too worried about manual location constraints assignments as I usually want to use the VIvado board design wrapper as a component in a higher level hierarchy and have to do this anyway. While there may not be timing constraints required for your current ZMOD offerings I would expect that this is not a general expectation. Currently, placing your ZMOD controller IP in a board design leaves no way to connect it to either the ZYNQ7 or external pins using automation. In the interim perhaps you could provide a 'recipe' for re-creating the hardware in Vivado used with the SW projects.

[edit] I did just now follow the link that you provided above and hadn't noticed the process for adding a heirarchal block... will try it asap. There's a LOT of disconnected material to reference in order to experience your Eclypse Z7 demos in action. Generally, all I want from a demo is to verify that the hardware and supporting code work, and that this is a simple, easy, quick process. When it takes a day or two to run a demo that suggests that things are a bti too complicated, at least to my way of thinking.

44 minutes ago, Ciprian said:

Could you please send me the changes that you have made so that we can look in to it and correct the potential issues?

I do keep notes about what I'm doing but they might not be sufficient to answer your question. I might need to some time to re-create what I've done and run into. I do remember that the part about linking the zmodlib to the projects was problematic on both OSes.

After thinking about it I do remember that un-compressing the sysroot file structure in Windows had warnings about losing links from the 7-ZIP utility that I used in WIN10. This could well be the problem that the SDK had with SYSROOT. The warnings happened decompressing the tar file.

Edited by zygot

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7 minutes ago, zygot said:

After thinking about it I do remember that un-compressing the sysroot file structure in Windows had warnings about losing links from the 7-ZIP utility that I used in WIN10. This could well be the problem that the SDK had with SYSROOT. The warnings happened decompressing the tar file.

That is the problem. We'll work on getting a SYSROOT Windows can digest.

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12 minutes ago, zygot said:

Well, that and the fact that you provide no means to re-created the SW bitstream and associated export files that go with the SW demo code.

Actually, there is a way of recreating the Vivado project from which the .hdf is obtained. You can do this by using the digilent-vivado-scripts inside the Eclypse-Z7-HW repo. This approach requires you to have the Eclypse Z7 board file, otherwise it will fail. You can use it with both python and from within Vivado... the README.md inside will provide all the information you need.

-Ciprian

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42 minutes ago, Ciprian said:

Actually, there is a way of recreating the Vivado project from which the .hdf is obtained. You can do this by using the digilent-vivado-scripts inside the Eclypse-Z7-HW repo.

Again, too complicated, too many balls to juggle.

But, I will try using the scripts because using the vivado-heirarchies supporting code didn't get me a validated board design.

I did clone the vivado-heirarchies and use the provided tcl script to add it to my WIN10 test project block diagram. After running the connection automation the DAC had no issues but the input clocks for the ADC were unconnected and there was an orphan clock-wizard block with it's outputs disconnected. The external pin nomenclature does seem to be consistent with the hierarchy constraints for each ZMOD though not the EclypseZ7 master constraints file.

[edit] THe above is partially, correct. Actually, both the ADC and DAC hierarchys had input clocks that were unconnected. I could make a guess about the sysclk inputs but the clock-wizard block only had one output clock...

Edited by zygot

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1 hour ago, Ciprian said:

You can use it with both python and from within Vivado... the README.md inside will provide all the information you need.

So, what come to mind is the old saw " We can do this the easy way, or we can do this the hard way..."

As a customer I don't mind doing it the hard way as long as the hard part only involves the vendor and my time isn't wasted hunting down specifics or exploring dead end trails. Let me suggest that the easy way for Digilent when releasing a product is to have someone at Digilent with minimal technical skill run through all of the steps in verifying that the customer experience matches what the developer's believe that the customer's experience will be. The extra step seems counter intuitive and expensive in terms of time and resource management but at the end of the day is far more efficient, less embarrassing, and makes for happy customers who find extra money to spend on more stuff.

So frankly, I do remember looking at the HW git repository and seeing that it was largely unpopulated and skimming through the readme files ( so many readme files and links and references to work through just to see a demo run...) and deciding that there must be a better way than figuring out how to run the versioning scripts. As it turns out it appears to be the only way for users of the Eclypse Z7 at the moment.

So please help me out with a short recipe that fills out the HW repository with a Vivado project supporting both ZMODs in their respective port locations that exports SDK sources compatible with the demos. ( BTW, none of the bare-metal demos compiled either for me on either OS but I'm not too concerned with that yet. )

PS. Your versioning system might be great for your developers but it shouldn't force a customer to change the way they structure their development.

Edited by zygot

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20 hours ago, zygot said:

So please help me out with a short recipe that fills out the HW repository with a Vivado project supporting both ZMODs in their respective port locations that exports SDK sources compatible with the demos.

Perhaps, I should restate this. When you get the time some weekend at home pretend to be a customer whose bought an Eclypse A7. On a personal PC install Vivado. Install all of the relevant Digilent repositories. Follow whatever instructions you see provided and create the HW export files used in the SW demos. Build all of the demos.Then post what OS you used and what exactly you did to generate the Vivado and SDK files. How hard can that be?

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On 2/14/2020 at 10:41 AM, Ciprian said:

Actually, there is a way of recreating the Vivado project from which the .hdf is obtained. You can do this by using the digilent-vivado-scripts inside the Eclypse-Z7-HW repo. This approach requires you to have the Eclypse Z7 board file, otherwise it will fail. You can use it with both python and from within Vivado... the README.md inside will provide all the information you need.

I have to assume that this statement is based on experience. So how, exactly, did you do this based on the repository documentation?

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Anyone can order an Eclypse Z7 with an ADC and DAC module as I did. This provides 4 channels of 100 million samples of data per second. This aggregates to about 800 million bytes of data per second. One way to handle this on a ZYNQ based platform would be to put the PS DDR external memory in the data path of all four channels. How 4 DMA channels of nearly 200 MB/s per channel would work out on a ZYNQ7 system with the ARM cores using the same memory is not something that I've worked out or even have a clue about. I have both of the only two ZYNQ based SYZYGY platforms that exists and neither vendor has demonstrated that they've figured this out yet either,

Fortunately, none of the projects that I have in mind for the Eclypse Z7  require the PS external memory to be in the data path of all 4 converter channels. There is only one non-ZYNQ based SYZYGY platform that I know of and for which this isn't an issue. I just thought that it would be productive to point out the elephant hiding in the corner of the room. He's hard to miss. As long as he doesn't know that you see him I don't think that he's all that scary. Perhaps someone else has figured out how to make acquaintances with him and enjoyed the encounter and can share.

Edited by zygot

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On 2/17/2020 at 6:31 AM, zygot said:

I have to assume that this statement is based on experience. So how, exactly, did you do this based on the repository documentation?

With regards to this, the process is described in Workflow 5 of the digilent-vivado-scripts readme. In addition to these, the steps in the Eclypse Z7 Git Repo Documentation's Navigating and HW sections should be used after cloning, and before running any scripts. I am looking into getting these steps all in one place.

-Arthur

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3 hours ago, artvvb said:

I am looking into getting these steps all in one place.

Thanks. You understand that any process for building a project that involves a Git repository will work differently on Windows and Linux platforms. I appreciate the complexity that's involved. Xilinx is the source of much of the difficulty but adding more layers of complexity onto layers of source material that is constantly being broken may not be the answer. For customers the goal is to be able to quickly and easily verify that newly acquired hardware works as expected and demonstrates that there's a path to moving on to the effort of putting that hardware to work doing what it was purchased for. Because the Eclypse Z7 adopts the SYZYGY plug and play framework you have the extra work of meeting customer expectation of inter-operability inherent in the framework. Personally I believe that SYZYGY is a big deal. Being an early adopter has market advantages but this comes with an out-sized burden of effort; and this is likely an instance where "work smarter not harder" is an appropriate admonition. 

Edited by zygot

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@artvvb,

I'm busy trying to do other things but I have read through all of the material you reference and still have not been able to figure out how to re-create the ZMOD SW Vivado hardware export files, on either Win10 or Linux hosts. It doesn't help that there are multiple Eclypse Z7 hardware repositories. I really don't see the point of the OOB demo at all.

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The material I referenced discusses how to recreate an HDF file from the sources. After this, using the demos in baremetal should only require updating the hardware specification for the SDK hardware platform to the new HDF in the SDK workspace in the SW submodule. Using them in Linux requires retargetting the petalinux project (the OS submodule) to the new HDF and rebuilding it (I am less clear on this process, but the Adding Zmod Support in Petalinux guide should cover the relevant commands) - this is only possible in Linux, due to the Petalinux installation requirements.

The OOB is the source for the demo programmed into flash during manufacturing. It's really barebones, but is intended to be enough to know that the Zynq can be programmed and actually works. There is currently some duplication of these sources between the OOB branch/es of the Eclypse-Z7 repo and the Eclypse-Z7-OOB repo - I am looking into resolving this.

-Arthur

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2 hours ago, artvvb said:

The material I referenced discusses how to recreate an HDF file from the sources.

Well I've tried following the material that you've referenced and have not gotten a board design that is gets validated or is complete. I've tired it on Win10 and Linux. The Eclypse Z7 has a vivado-library that is different than what you get if you just clone or obtain a zip of the git vivado-library repository. I'm pretty convinced by now that no one from Digilent has tried this on a PC that isn't connected to Digilent's IT network. If anyone had it wouldn't take more than 10 minutes to write out what they did and on what platform they did it, and certainly not more than a few lines.

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