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Analog Discovery 2 - SPI Chip Select delay


dos6510

Question

Hi,

i am running my first step with the Analog Discovery 2.
I need a SPI datapacket repeating every 1ms (no idea if that´s possible).

Right now, a simple script from the example turned out that the CS is active about 5ms prior to the data packet.
Which is bad if you need the packet repeating every 1ms.

Is this even possbile with my setupt?

Is the script run from the windows side of the programme or transferred to the FPGA?

 

best regards

 

 

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Hi @dos6510

In the WF SDK the CS is controlled by software, so it has a latency of 1-10ms.

In the WF app Protocol/I2C/Sensor the instructions in loop are translated to a custom pattern. This constant pattern can be repeated at high rate.
This ideal for sensor where the same command is sent out and the received data can be decoded in parallel.
See the SDK/samples/py/DigitalOut_CustomBus.py

image.png.2f3a79ff0a5853576d33c75d638f908d.png

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