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AXI Interconnect PS PL on Zynq US+


Question

Hi everyone,

I am looking for some guidance here:

I need to interface my PS processor (user space application running on PetaLinux) with an IP created using Vivado HLS. My block design is shown below.

I just want to pass some data to my IP (sha256), have the calculation done on PL and return the value to my processor ARM Cortex-A53 on the PS.

From a block design perspective, am I missing something? Do I need to add an AXI DMA in between my MPSoC and my AXI interconnect?

Appreciate your help

image.png.3e3a555e9d60025b09af76b42abdd3f2.png

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