[Zybo-Z7] XADC 1st time: Is this schematic safe? How to prevent damages of hardware?

[yottabyte]

Hi,

apparently it is easy to damage something by playing around with the XADC-port (of a Zybo-Z7 in this case). I want to read the charging curve of a capacitor. How I thought this could be done I simulated in LTSpice:

300mv are much less than the maximum 1V and I added R5 and R3 because there are no preresisitors inside XADC-ports. I guess this way my hardware should survive the first time converting an analog voltage curve into digital value. But I'm, just guessing so the two questions I have about this are

1. Is this safe?

2. Is there a better way to do this?

and also

3. How sensible are the XADC-Ports really? How high do currents and/or voltages have to be to cause damages? Are maybe the only important rules to prevent short circuits through XADC-hardware by placing a preresistor and prevent voltages above 3.3V?

Thank you!

 

/edit

Question #4

Would a combination of resistors (one would be enough I think) and Zener-diodes (breakdown at 1V), as you can see below, securely protect any hardware onboard of any mistakes done outside XADC-Pmod? This is just a result of my tiny little knowledge of analog elecronics. Simulation does agree but that is just simulation. Maybe in reality and for a very short time there still could be constellations causing voltages and/or currents that could damage my board...

Or is this schematic below really a secure protection?

Depending on how XADC-hardware looks inside, theoretically a short circuit current would cause high voltages which should also be taken by the diodes, ...I guess. So are resistors maybe not even needed and only Zener-diodes would already give a safe protection of hardware damages?

 

[xc6lx45]

Hi,

with 10k resistors you'll be hard-pressed to do any damage. Assume for example I'd apply 100 V. R3/R5 limit the current into the pin to 10 mA and the ESD diodes on the chip side can easily handle this. They'll clamp the IC side voltage to VCC/VDD rail +/- 0.7 V, give or take some. Most likely, the resistors will burn out first. Rule of thumb, to damage the chip you'll need hundreds of milliamperes into the pin or an excessive dV/dT as in an ESD shock.

The 7 series chips are pretty tough.The XADC is in no way a high-performance circuit and I'm not aware that the input pins are any more sensitive than normal GPIOs.
I'm not taking complaints if you still manage to burn the board ? but as a rule of thumb, FPGAs are very robust creatures in the lab, especially with series resistor padding.

[yottabyte]

Thank you @xc6lx45 ! Really interesting lesson... The way I see FPGA hardware seems to change a lot in this moment, -in a way I like a lot

So do I understand you correctly, that this,

7 hours ago, xc6lx45 said:

to damage the chip you'll need hundreds of milliamperes into the pin or an excessive dV/dT as in an ESD shock.

, means, that damage can be caused by high current or an excessive change of voltage in a short time BUT NOT by relative big voltages themselves, as long as they don't change too quickly?

So with voltages that are "just" a few times as high as they are supposed to be, like 10V maybe for example, diodes on chip will keep away what is too much? (-reliably if serial resistance provided?)

But reading

7 hours ago, xc6lx45 said:

Most likely, the resistors will burn out first.

should probably tell me not to have to ask ?

[xc6lx45]

yes, the trick is, the chip won't let you apply a large voltage in the first place without a large current.
And never mind the dV/dT, it's kind of academic as long as we aren't shipping to a customer in volume, building pacemakers, thermonuclear missiles or self-driving cars ?

But, if you apply for example 12 V without current limit such as caused by a slipped oscilloscope probe on an HSMC connector (seen it happen on a $4k board and no, it wasn't me),  it will destroy the FPGA immediately.