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Flash Image Offset for SREC SPI Bootloader?


Johnnie White

Question

How do you calculate the flash image offset for the SREC SPI bootloader?

I'm following the directions in the 'How To Store Your SDK Project in SPI Flash' and curious of how the Flash Image offset is calculated.

The provided offsets in 1.3) are good if I'm using a Digilent board but what if I'm not, which is the case.

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

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Hi @Johnnie White,

My understanding for how calculating the flash offset is dependent on the size of the bitstream (which varies between different FPGA boards, though it will be the same for a particular board each time because each slice has to be configured). There is also some additional details in this Avnet tutorial in section 9.3 with regards to choosing an offset, https://www.avnet.com/opasdata/d120001/medias/docus/178/UG-AES-A7MB-7A35T-G-Arty-SREC-Bootloader-VIV2015-2-V1.pdf, though in the end the folks on the Xilinx forum would be able to better answer how that particular portion of the Xilinx software works/needs to be configured.

Thanks,
JColvin

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