I am currently working on a system which requires ethernet control on an FPGA. To this extent I have successfully managed to implement the echo server as per Xilinx`s tutorial. However, I now require to transmit data from my laptop to the FPGA. I am unsure of how to amend this project in its current state to receive data from an external program (such as matlab) and from where to verify the data I have received is correct. Could anyone kindly provide some insight? Regards
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Luke Abela
Good day,
I am currently working on a system which requires ethernet control on an FPGA. To this extent I have successfully managed to implement the echo server as per Xilinx`s tutorial. However, I now require to transmit data from my laptop to the FPGA. I am unsure of how to amend this project in its current state to receive data from an external program (such as matlab) and from where to verify the data I have received is correct. Could anyone kindly provide some insight? Regards
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