Zybo z7-10 adc + hdmi

[DirkMasky]

hi all,

i want want to measure a voltage with the zybo and display the measured values on a screen via hdmi output.

i used the hdmi passthrough projent as a start and got that working fine. know when i added the adc in vivado i get the error that the Vccs on bank 35 are incompatibele  because the hdmi used 3.3V and the adc uses 1.8V. but when i look in the schematic under synthesis and look and the i/o ports i see that the hdmi aslo uses 1.8V.

so why is it a problem when the adc needs 1.8V but when the hdmi needs 1.8V it works just fine.

[cwerner77]

Hello DirkMasky,

please check if one of your constraint files (Vivado>Project manager->Sources->Constraints) contains the following lines for specifying the correct IO standard for the xadc package pins:

#Pmod Header JA (XADC)
set_property -dict { PACKAGE_PIN N15   IOSTANDARD LVCMOS33 } [get_ports { ja[0] }]; #IO_L21P_T3_DQS_AD14P_35 Sch=JA1_R_p            
set_property -dict { PACKAGE_PIN L14   IOSTANDARD LVCMOS33 } [get_ports { ja[1] }]; #IO_L22P_T3_AD7P_35 Sch=JA2_R_P              
set_property -dict { PACKAGE_PIN K16   IOSTANDARD LVCMOS33 } [get_ports { ja[2] }]; #IO_L24P_T3_AD15P_35 Sch=JA3_R_P             
set_property -dict { PACKAGE_PIN K14   IOSTANDARD LVCMOS33 } [get_ports { ja[3] }]; #IO_L20P_T3_AD6P_35 Sch=JA4_R_P              
set_property -dict { PACKAGE_PIN N16   IOSTANDARD LVCMOS33 } [get_ports { ja[4] }]; #IO_L21N_T3_DQS_AD14N_35 Sch=JA1_R_N         
set_property -dict { PACKAGE_PIN L15   IOSTANDARD LVCMOS33 } [get_ports { ja[5] }]; #IO_L22N_T3_AD7N_35 Sch=JA2_R_N              
set_property -dict { PACKAGE_PIN J16   IOSTANDARD LVCMOS33 } [get_ports { ja[6] }]; #IO_L24N_T3_AD15N_35 Sch=JA3_R_N             
set_property -dict { PACKAGE_PIN J14   IOSTANDARD LVCMOS33 } [get_ports { ja[7] }]; #IO_L20N_T3_AD6N_35 Sch=JA4_R_N 

As far as I understand, these lines are required for using the auxiliary analog input pins (c.f. https://reference.digilentinc.com/reference/programmable-logic/zybo/reference-manual#dual_analogdigital_pmod_xadc_pmod). If these lines are missing, I think that the IO standard for these package pins might default to a wrong voltage value.

I haven't tested it myself, yet. Good luck!

Best regards,

Christian

[DirkMasky]

On 12/9/2019 at 8:35 PM, cwerner77 said:

Hello DirkMasky,

please check if one of your constraint files (Vivado>Project manager->Sources->Constraints) contains the following lines for specifying the correct IO standard for the xadc package pins:

#Pmod Header JA (XADC)
set_property -dict { PACKAGE_PIN N15   IOSTANDARD LVCMOS33 } [get_ports { ja[0] }]; #IO_L21P_T3_DQS_AD14P_35 Sch=JA1_R_p            
set_property -dict { PACKAGE_PIN L14   IOSTANDARD LVCMOS33 } [get_ports { ja[1] }]; #IO_L22P_T3_AD7P_35 Sch=JA2_R_P              
set_property -dict { PACKAGE_PIN K16   IOSTANDARD LVCMOS33 } [get_ports { ja[2] }]; #IO_L24P_T3_AD15P_35 Sch=JA3_R_P             
set_property -dict { PACKAGE_PIN K14   IOSTANDARD LVCMOS33 } [get_ports { ja[3] }]; #IO_L20P_T3_AD6P_35 Sch=JA4_R_P              
set_property -dict { PACKAGE_PIN N16   IOSTANDARD LVCMOS33 } [get_ports { ja[4] }]; #IO_L21N_T3_DQS_AD14N_35 Sch=JA1_R_N         
set_property -dict { PACKAGE_PIN L15   IOSTANDARD LVCMOS33 } [get_ports { ja[5] }]; #IO_L22N_T3_AD7N_35 Sch=JA2_R_N              
set_property -dict { PACKAGE_PIN J16   IOSTANDARD LVCMOS33 } [get_ports { ja[6] }]; #IO_L24N_T3_AD15N_35 Sch=JA3_R_N             
set_property -dict { PACKAGE_PIN J14   IOSTANDARD LVCMOS33 } [get_ports { ja[7] }]; #IO_L20N_T3_AD6N_35 Sch=JA4_R_N 

As far as I understand, these lines are required for using the auxiliary analog input pins (c.f. https://reference.digilentinc.com/reference/programmable-logic/zybo/reference-manual#dual_analogdigital_pmod_xadc_pmod). If these lines are missing, I think that the IO standard for these package pins might default to a wrong voltage value.

I haven't tested it myself, yet. Good luck!

Best regards,

Christian

i have checked my constrain file and i only have the lines for ad14 enabled. do i need all of them enabled because i only plan to use ad14.

[cwerner77]

Hi,

I don't know. At least these two pins are the ones that seem to cause your error message. According to the error message, Vivado fails to set the correct IO standard for these two pins. Please try to remove your constraint file from the project and then add it again: https://forum.digilentinc.com/topic/968-conflicting-voltages-in-bank/

By the way: Have you successfully managed to measure voltages with this demo project?

• https://github.com/Digilent/Zybo-Z7-10-XADC/releases

Maybe these hints are also helpful for your project:

• https://forums.xilinx.com/t5/Implementation/Rule-violation-BIVC-1-Bank-IO-standard-Vcc/td-p/757805
• https://forums.xilinx.com/t5/Other-FPGA-Architecture/Analog-voltage-range-for-XADC/td-p/700937
• https://forums.xilinx.com/t5/Other-FPGA-Architecture/XADC-constraints-and-I-O/m-p/863324

Best regards,

Christian