ARTY A7 Digital IO Mapping

[Johnnie White 0]

Hi,

How is digital shield pins IO0-IO13 mapped to FPGA pins?

How is digital shield pins IO26-IO41 mapped to FPGA pins?

The schematic says CK_IO0 is pin V15 but when I toggle it nothing happens.

Thanks,

Johnnie White

[Johnnie White 0]

Never-mind, I figured it out.   I forgot to load the FPGA image.