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Arty DDR3 Pins in .xdc File


SteveP

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I'm trying to compile the Xilinx example file for the MIG generated DDR3 controller in Vivado 2015.4.  I used the .ucf file to generate the controller just fine.  But when I look at the .xdc file, I don't see the DDR3 pins.  I see all the other interfaces I believe, except for the DDR3.  Won't this prevent a design that uses the DDR3 from compiling?

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On 4/15/2016 at 5:54 PM, SteveP said:

I'm trying to compile the Xilinx example file for the MIG generated DDR3 controller in Vivado 2015.4.  I used the .ucf file to generate the controller just fine.  But when I look at the .xdc file, I don't see the DDR3 pins.  I see all the other interfaces I believe, except for the DDR3.  Won't this prevent a design that uses the DDR3 from compiling?

Thanks.  If you don't mind, I would like to understand the reasons behind putting the DDR3 pins in a .prj file (which may just be my lack of Xilinx tool experience).  If the other pins are in the .xdc file, why are the DDR pins handled differently?  .prj files don't seem to be a normal file for Vivado and aren't generated in the normal compile flow.  Thanks for any of this background.

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Hey Steve,

The advantage to using the prj file vs a traditional xdc is that the prj will configure the whole MIG IP whereas an xdc will only constrain the pins. Along with the pins, the prj handles options such as device ID, data formatting, and signal impedance. Going through all these options are a serious pain when configuring the mig and the .prj gets rid of this hassle. The MIG is very configurable for different memory devices but since the ARTY just has the one, there isn't a need to run through the whole IP configuration repeatedly when the prj handles it.

However you do learn a lot by going through the wizard and trying to set it up manually too! Hope this gives a little reason as to why we put out the prj file.

-Sam

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On 5/10/2016 at 3:02 AM, sLowe said:

Hey Steve,

The advantage to using the prj file vs a traditional xdc is that the prj will configure the whole MIG IP whereas an xdc will only constrain the pins. Along with the pins, the prj handles options such as device ID, data formatting, and signal impedance. Going through all these options are a serious pain when configuring the mig and the .prj gets rid of this hassle. The MIG is very configurable for different memory devices but since the ARTY just has the one, there isn't a need to run through the whole IP configuration repeatedly when the prj handles it.

However you do learn a lot by going through the wizard and trying to set it up manually too! Hope this gives a little reason as to why we put out the prj file.

-Sam

thanks a lot!!!

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