iic setup failure

[scw7t3]

I am new to working with FPGAs so please bear with me. I am using the Digilent Arty A7 Artix-7 100T. I ran through the tutorials and some example designs for my board and everything is working. I tried building a simple Microblaze design for axi iic and the design checker has no errors and the binary was built fine. I exported everything to SDK and the UART self test works, but the iic and spi self tests both fail. I tried seeing where it failed and I think it might have something to do with the pointer location or the interrupt. I have also tried the other examples and hooking a sensor up to the iic pins and hooking up an oscilloscope and nothing happens. There are no errors in the debugger. I have already gone through the provided material and can't make heads or tails on the issue.

iic_test.txt

[scw7t3]

*UPDATE* 

I was playing around with the debugger, and it looks as if it skips writing to the actual register. There's an #ifndef ENABLE_SAFETY that looks like it's blocking the else statement from happening which from what I can found is what actually talks to the register.

I tried editing this file, but it must be protected in some way because as soon as I save the file it reverts to it's previous form. 

Since I figured out simple debugging, I should be able to get more info if needed. 

Thanks

[scw7t3]

*UPDATE*

Looks like there's something going on with memory. I tried to manually write to the peripheral address using the xsct console but it will not change the value. I changed other address values using this took to make sure that the tool is working.

I even used mwr -force 0x40800028 0x01234567 and the address never changes

I verified in the xparameters.h file that my address is correct and that it was defined correctly. 

I rebuilt the project and disabled the cache of the microblaze and no change.

My question is whether I'm looking at the correct memory location when using the memory monitor, or some internal cache and the address I need to be writing to is elsewhere. 

Basically, I'm at a loss.

[TommyK]

Its sounds to me like a memory issue as well. It looks to me like you are accessing the correct memory location. This isn't a problem with the cache. I think I've had issues with the Smart Connect IP before. Try recreating the block design without the Smart Connect IP.  Try running connection automation and unchecking the object (MIG?) that wants to add a SmartConnect IP.

 

-Tommy

[scw7t3]

sorry for the delay, but it turns out that actually worked! There was a selection pane when you went to run config auto that asked if you wanted memory interface generator to config as cache or peripheral, and by selecting peripheral it got rid of the AXI smart connect block which was holding everything up! Here's the diagram in case it helps anyone!

[TommyK]

Glad it worked!