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HasanWAVE

Custom IP interrupt

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Hello,

I am trying to make a custom IP with an interrupt. I selected the interrupt option when creating my IP block. The problem that I am having is that, there are 5 slave registers in the custom_ip_intr.v file (intr_en, global_intr_en, ack, status, intr_pending), and from what I understand is that I would have to control them via the ARM to enable, set, reset and disable them. I have added those registers in the user ports and also in the top module, but I cannot get the registers memory mapped addresses in the SDK which I can control. How could I do that ?
 

Regards,

Hasan

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Hi @HasanWAVE

The address range assigned to the custom IP's AXI_INTR interface can be found in IPI's Address Editor and manually brought into SDK. To bring the base address into SDK automatically, you will need to add C_S_AXI_INTR_BASEADDR (and possibly C_S_AXI_INTR_HIGHADDR) to the list of parameters found in the TCL script in the IP's Software Driver file group.

Offsets from the base address for particular registers are typically manually defined in SDK through the use of macros.

The code blocks below show the changes to the IP's sources I would suggest as a starting point. I am working with the template with no other changes, and have not tested this to make sure that it works.

EDIT: Note that I am using Vivado 2019.1, there may be some differences in the AXI IP template between versions.

File Groups -> Advanced -> Software Driver -> myip.tcl

proc generate {drv_handle} {
	xdefine_include_file $drv_handle "xparameters.h" "myip" "NUM_INSTANCES" "DEVICE_ID"  "C_S00_AXI_BASEADDR" "C_S00_AXI_HIGHADDR" "C_S_AXI_INTR_BASEADDR" "C_S_AXI_INTR_HIGHADDR"
}

File Groups -> Advanced -> Software Driver -> myip.h

<...>

/****************** Include Files ********************/
#include "xil_types.h"
#include "xstatus.h"

#define MYIP_S00_AXI_SLV_REG0_OFFSET 0
#define MYIP_S00_AXI_SLV_REG1_OFFSET 4
#define MYIP_S00_AXI_SLV_REG2_OFFSET 8
#define MYIP_S00_AXI_SLV_REG3_OFFSET 12

#define MYIP_S_AXI_INTR_REG_GLOBAL_INTR_EN_OFFSET 0
#define MYIP_S_AXI_INTR_REG_INTR_EN_OFFSET 4
#define MYIP_S_AXI_INTR_REG_INTR_STS_OFFSET 8
#define MYIP_S_AXI_INTR_REG_INTR_ACK_OFFSET 12
#define MYIP_S_AXI_INTR_REG_INTR_PENDING_OFFSET 16

<...>

Thanks,

Arthur

Edited by artvvb

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