Pcam5c Connection to Xilinx MIPI_csi2_rx_subsyst

[Bill_H]

Hello,

I have the pinout for the Pcam5c and was wondering if anyone knows if it connects to the MIPI_csi2_rx_subsyst IP in Vivado?  In the Digilent document for the board it defines signals as Lane 1, Lane 2, and CSI-2 clock and in the IP it's listed data_hs, and data_ip.  Can anyone provide a map between these two naming conventions?

 

Thank you,

Bill_H

[Bianca]

Hi @Bill_H,

Sorry for the late reply. The camera is not directly connected to the CSi2 IP. It's connected to DPHY IP and that is connected to the CSI2. You can see how we did in our example, here.

 

Regards,

Bianca

[Bill_H]

Hello Bianca,

I'm more interested in creating my own application than following the example as I'm planning to do something a little different.  Does Diligent provide a detailed data sheet for the camera?  I found a data sheet, but it doesn't provide information on what the vectors should be for the input data from the camera to the DPY.  I'm only planning to follow the example to including the PHY, and csi to RX.  

Will I need to use the linux driver to command the camera for using SDK?  I was planning to write all the SDK code in C.

Thank you,

Bill_H 

[JColvin]

Hi @Bill_H,

I'm not sure which datasheet you happened to look at, but did you look at the one that we have in the Additional Resources section of the Pcam 5C Resource Center (link)?

I'm not certain what you are referring to with regards for "the linux driver" but our demo application does not use a linux system.

Thanks,
JColvin

[Bill_H]

Hello JColvin,

Sorry, for the late response.  I didn't see the additional resources, but just looked at it, looks good.  

I have another question about the Pmod MTDS touch screen.  Can I use the v_osd IP block (Video on Scree Display) to connect to the touch screen?    

Thank you,

Bill

 

[JColvin]

Hi @Bill_H,

Not that I am aware of. The Pmod MTDS has it's own IP core that Digilent created available here: https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/PmodMTDS_v1_0. The main thing is that the MTDS has it's own embedded processor that the host board communicates with over a pre-determined set of SPI commands, so v_osd IP from Xilinx will probably not work in this case.

Let me know if you have any questions about this.

Thanks,
JColvin