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aadgl

Zybo Z7, PCAM 5C, Find/Copy files, Stalls in assy code

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Hi ,

I have a new Zybo Z7-20 that is running other vhdl/arm code well under Win10.

I am trying to run this demo in Vivado 2018.2
> Zybo-Z7-20-pcam-5c-2018.2-1.zip

These are results from the numbered steps in README.md:
> Steps 1-3, OK, except project is out of date, continue w/o rebuild
> Steps 4-17, FPGA programs OK, etc
> Step 18, Fails to run
    - Trying to run the c program reports the executable doesn't exist
    - Build yields "ps7_init.h" is missing ...
    - Copy "ps7_init.h" and "ps7_init.c" to sdk ... src folder
    - Build yields "ff.h" missing error ...
    - Modify BSP to include "xiffs"
    - Build is sucessful
    - Cycle power, restart SDK, terminal, reprogram FPGA, etc
    - C program run, but visible change on Zybo or HDMI
    - Add "xil_printf("Hello World\r\n");" at top of main() in main.c
    - Cycle everything and run, prints "Hello World" and stalls
> Step 18, single step in debug:
    - Boots from JTAG
    - Never returns from "FsblHandoffJtagExit();"
    - Stalls in assembly at the "wfe" call:
         FsblHandoffJtagExit:
                 mcr     15,0,r0,cr7,cr5,0        /* Invalidate Instruction cache */
                 mcr     15,0,r0,cr7,cr5,6        /* Invalidate branch predictor array */

                 dsb
                 isb                                          /* make sure it completes */

                 ldr    r4, =0
                 mcr     15,0,r4,cr1,cr0,0        /* disable the ICache and MMU */

                 isb                                          /* make sure it completes */
         Loop:
            wfe
             b Loop

I was able to rebuild the project and needed to find/copy these .xdc files to build in Vivado:
> Zybo-Z7-20-pcam-5c.srcs\sources_1\bd\system\ip\system_MIPI_CSI_2_RX_0_0\hdl\line_buffer\line_buffer\line_buffer.xdc
> Zybo-Z7-20-pcam-5c.srcs\sources_1\bd\system\ip\system_MIPI_CSI_2_RX_0_0\hdl\cdc_fifo\cdc_fifo.xdc
> Zybo-Z7-20-pcam-5c.srcs\sources_1\bd\system\ip\system_MIPI_CSI_2_RX_0_0\hdl\cdc_fifo\cdc_fifo_clocks.xdc
Then needed to add the same files to SDK as described above.
The new build has the same problem as the "out of date" version from the zip, stalls at "wfe".

The Zybo Z7 has worked very well for other projects in Vivado 2019.1

Please advise on corrective actions, web pages I missed, etc.

Thanks,
Dave

 

 


  

Edited by aadgl

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5 answers to this question

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Hi @aadgl,

I apologize for the delay. I have reached out to another engineer about this; I also received the same errors, but I'm uncertain of the way to correct this.

Thanks,
JColvin

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Hi @aadgl!

Here you can find the fixed release. Indeed there was a problem with the release you tried which were solved, but not released yet.

The documentation has been updated, too.

Hope this fixes your issues.

OvidiuD

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