How to program Arty flash

[davec]

So I created a microblaze design on Arty in Vivado 2015.3 with lwIP axiether and some GPIO to control my external hardware.  I wrote my C code in SDK.  From SDK, I can download the FPGA config and then run my C code on Arty by doing Run -> Run As -> 1. Launch On Hardware.  Everything works great!

Now I want to put this all in flash so it will come up on power-up reset.  I read Xilinx #63605, how to create an MCS boot image, but I am confused.  Do I need to include an axi_quad_spi in my block design, or does the SDK flash programmer take care of this? (I don't need SPI in my design otherwise).  I'm not sure what files to combine into the mcs.  Is there a tutorial on this subject? Thanks-  Arty is a great product!

[davec]

Thanks, mskreen.  I managed to load the FPGA along with a bootloader program (srec_bootloader) from flash!  The user code that I ultimately want to run does not fit into block ram, hence it must be moved from flash to DDRAM by the bootloader that is running in blockram.  Now my problem is that as I mentioned above, I am not seeing the SCK run once the bootloader executes. My block design has an axi_quad_spi, but the sck_o and sck_t signals don't come out to the outside world, only io[3:0] and ss signals.  I tried adding the signals in the hdl wrapper, but they get blown away when I resynthesize because they don't appear on my block design.

Any ideas- from anyone who has implemented flash on the Arty?

TNX

[davec]

I figured out why the sck signal is not getting implemented-  For some reason, "PARAM_VALUE.C_USE_STARTUP" is not set to zero, so when the file "board.xit" does not see this variable =0, it does not implement the sck pin (L16).   I cheated and took out this test in "board.xit" (because I don't know where that PARAM_VALUE gets set).  I added constraints for the pin:

set_property PACKAGE_PIN L16 [get_ports qspi_flash_0_sck_io]
set_property IOSTANDARD LVCMOS33 [get_ports qspi_flash_0_sck_io]

and I now get a clock to the QSPI flash when the bootloader runs.

One last step to solve- where to put my user program in flash that the bootloader will copy into DDR.  The tools don't tell me how large the FPGA config file is (with compression on).

I looked at the file size of the .bin file and rounded up to the next 1K, but I wish there was a programmatic way to do this from Vivado.

Hurray- On power-up I can now config the FPGA, run the bootloader in block ram, which then copies my large user program from flash to DDR  and executes.

 

[George]

Hello,

 

I have been reading multiple posts regarding the usage of a bootloader, and more specifically with the Arty and I think that this one is the most relevant.

I managed to get one of the tutorials working fine, but I have one problem though that I cannot figure out since a few days.

I am able to program my flash with (bitfile+bootloader) + application, and make the application run by pressing the PROG button of the Arty board. However, when I power reset the board, I see the done pin set, but it seems that the app does not start. Any ideas on the reason behind this behavior?

Thank you very much for your help

cheers

George

PS: After power reset, when I press the PROG button sometimes it loads the app and sometimes it does not.

[TommyK]

Hi davec,

Good catch. None of our other boards use configurable pins for the QSPI CCLK, so this one slipped through in the board files, I'll get it fixed asap.

Next up, you'll need to create a bootloader to run your program out of DDR memory. There's a brief walkthrough here, but if you have problems, feel free to ask!

Hope this helps!

[davec]

Thanks Tom and J-

It's all running now.I am using the srec_bootloader from SDK.

I looked everywhere and did not see a reference to C_USE_STARTUP.  I guess it was a carry over from a previous design.

How (and where) would I set a PARAM_VALUE if I wanted to?

 

[TommyK]

That's an IP configuration parameter. These parameters are tied to the GUI in the Re-customize IP window when you double click an IP in the block design. 

[oe7aft]

Hi,

Thanks for sharing your solution, but it is difficult to get the "whole picture". Could you please provide on your ARTY Resource Center a complete step-by-step tutorial on how to boot  and load a uBlaze application program from SPI flash? It would be really helpful!

BR

 

[mskreen]

oe7aft,

 

I have just finished a simple guide on how to store a SDK/Microblaze project in flash. You can find it on the Arty Resource Center here. Please let me know if you have any additional concerns and I will do my best to assist you. 

 

Mikel

[oe7aft]

Thanks Mikel, very helpful!

in the meantime I have found that Avnet has also a tutorial on this topic here (under "Documents").

I can now move on with my SDR project ;-)

BR

Enrico

[mskreen]

Great to hear Enrico! Let us know if you hit another roadblock or need anything else. Also, feel free to comment on the guide if things were not clear or if we could improve it in some way. A little constructive criticism is always welcome.

 

Mikel