jasonkh12 Posted September 21, 2019 Share Posted September 21, 2019 I am new to FPGA. I know that nexys2 board (Spartan3E) has 50MHz oscillator. Is there a way to generate 100MHz clock, since Clocking Wizard in IP Core does not support this board? Thanks Link to comment Share on other sites More sharing options...
zygot Posted September 21, 2019 Share Posted September 21, 2019 1 hour ago, jasonkh12 said: Wizard in IP Core does not support this board Where'd you get that idea? Spartan 3 devices have DCM blocks so it is certainly possible to create a 100 MHz clock from a 50 MHz input. You are of course using ISE since Vivado doesn't support older devices. If you don't find what you are looking for in the IP you can always instantiate a DCM as a macro in Verilog ro VHDL. Sometimes, like the Genesys Vritex5 it's not obvious from the selection of clocking IP how to get what you want. The solution is to learn about the device and instantiating resources as macros from the literature. Link to comment Share on other sites More sharing options...
jasonkh12 Posted September 22, 2019 Author Share Posted September 22, 2019 Thank you @zygot, Yes, I am using ISE. The Clocking Wizard is greyed out in IP Core and cannot be selected. I will try to instantiate it as macros. Thank you. Link to comment Share on other sites More sharing options...
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jasonkh12
I am new to FPGA. I know that nexys2 board (Spartan3E) has 50MHz oscillator. Is there a way to generate 100MHz clock, since Clocking Wizard in IP Core does not support this board?
Thanks
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