Unable to communicate to camera module via UART for ZYBO 7020 Pcam 5c demo on Vivado 2019.1

[V94]

Hello,

I have been trying for a while to run this PCAM 5c demo example that is provided by Digilent on a Zybo z7-20 board:

https://github.com/Digilent/Zybo-Z7-20-pcam-5c

The demo uses Vivado 2018.2 version, however I have been trying to execute it on the 2019.1 version. I am very new to FPGA and VHDL. I followed all the steps mentioned in the demo perfectly and did not receive any error. Although, after opening the project in the 3rd step, a pop-up window informs that the project is of the older version and I checked the option of automatically upgrading the project to current version. After the project opens, there is another pop-up to Report IP, I tried both the options individually i.e. Report IP and Ignore. It did not give any error in any of the following steps. But, the screen displays just a moving colour pattern and I am not able to communicate to camera module via UART as suggested in the demo. To summarise, all the steps mentioned in the demo were performed but the camera module is not working. I am unable to see the UART communication channel.

I also tried following the instructions to use digilent github demo projects:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/github-demos/start

However, this uses the 2016.4 version. I used the SDK Handoff method and again faced the same problem. 

Kindly suggest possible solutions to make this demo work on 2019.1 version or tell me what have I been doing wrong.

Thanks.

 

[Ciprian]

Hi @V94,

I'm unsure how you have manged to get a bit stream with the MIPI_CSI_2 IP core force upgrade. The core needs to be updated to the 2019.1 by us first; there are some primitives which have changed. This means that it should fail at synthesis in 2019.1.

Unfortunately I cannot give you an estimate when we will be able to update it to the latest version.

-Ciprian