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NotMyCupOfTea

Using Pmod DA3 on a Zybo Z7

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Posted (edited)

Hi everyone,

After having succesfully managed to use de XADC of the Zybo Z7010 board as explained in this post, I am now trying to use a DAC Pmod (reference and documentation here).

After having checked the documentation, I have tried to write the SPI connection to the DAC (please find the verilog file and simulation in the attached files).

Note, that I have decided to set the l_dac signal to 0 to enable continuous output to an oscilloscope.

The simulation seems to run well to me and to be in accordance with the documentation, however, the result is not satisfactory.

Indeed, the signal I want to output is on 16-bits and the command "output = 16'b1111111111111111", which should give the max value does not reach it. Besides, when I ask to "output = 16'b1000000000000000", which should give half of the max signal, the output is almost zero.

Finally, please find in the attached files the image I get on an oscilloscope when I input a sine signal with 0.5V offset and 1Vpp.

Does aybody see what I am missing ? Don't hesitate to ask more details if needed.

Thank you in advance,

 

DAC_wiz_0.v DAC_wiz_0.sim

200ms_per_div_and_1V_per_div.jpg

Edited by NotMyCupOfTea

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Hi @NotMyCupOfTea,

Here is the resource center for the Pmod DA3. Here is VHDL project using the Pmod DA3 from one of our community members @hamster. If you are using the Zynq processor for your project them you can use the add a module function and the VHDL code linked above.  Here is a forum thread that discusses using the add a module function.

best regards,

Jon

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Dear Jon,

Thank you for your answer. I have tried to instantiate de VHDL code from @hamster in my program as follows, after having added a VHDL source from the "add source" menu:

pmod_da3 myDAC (
       .clk(clk),
       .CSn(jc[0]),
       .LDACn(jc[2]),
       .SCLK(jc[3]),
       .SDAT(jc[1]),
       .level(dout)
    );

Where jc[0] is the correct CS pin, jc[1] data pin, jc[2] LDAC pin and jc[3] clock pin.

This seems to work quite well, until I input a signal of 10kHZ.

I have the same clock parameters as in @hamster XDC file.

I think the problem could come from the ADC but I'm not sure how to fix it. Usually, as the XADC has a 1MSB it should be able to cope with signals until 500kHz if I am not mistaken.

Thank you for your help,

test.vhdl xadc_digilent_forum_2.v XADC_to_DAC.xdc.xdc

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Posted (edited)

Hi @jpeyron,

Thank you for your answer.

If I understand the thread you pointed out well, I need to build an external low-pass filter.

Is it absolutely necessary ? Isn't there a way to use built-in components to do so ?

If not, I will try implementing the filter.

Bye,

Edited by NotMyCupOfTea

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Hi @NotMyCupOfTea,

I believe your options are either to build the filter or turning on the DSP filter on you oscilloscope(if you have that function available) as discussed in @hamster project.

best regards,

Jon

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