Tim S. Posted July 20, 2019 Share Posted July 20, 2019 I am trying to design a PL block design and SDK application to exercise the Pmod KYPD and Pmod OLEDrgb together with Vivado 2019.1 . I downloaded the Vivado-library git release for Vivado 2019.1 . In the SDK, I notice that driver PmodOLEDrgb.h is missing source files xspi.h and xspi_l.h . Where do these sources come from? Tim S. Link to comment Share on other sites More sharing options...
jpeyron Posted July 22, 2019 Share Posted July 22, 2019 Hi @Tim S., Please attach a screen shot of your SDK. best regards, Jon Link to comment Share on other sites More sharing options...
Tim S. Posted August 6, 2019 Author Share Posted August 6, 2019 Hi @jpeyron, I switched to the Arty A7-100T. I have imported the latest master git branch of the Digilent vivado-library for use in Vivado 2019.1 . The same missing files compilation error exists. See a screenshot below. Regards, Tim Link to comment Share on other sites More sharing options...
jpeyron Posted August 6, 2019 Share Posted August 6, 2019 Hi @Tim S., I created a Arty-A7-100T Vivado 2019.1 Pmod OLEDrgb and Pmod KYPD project. I have some screen shot's of the vivado block design, clocking wizard and SDK attached below. I did noticed your design_1_wrapper_hw_platform does not have the board folder. Are you using the digilent board files(install tutorial here)? best regards, Jon Link to comment Share on other sites More sharing options...
Tim S. Posted August 8, 2019 Author Share Posted August 8, 2019 Hi @jpeyron, I previously copied the Vivado board files under 2019.1/data/boards/board_files for both the /opt/Xilinx/Vivado/ and /opt/Xilinx/SDK/ directories on Linux. I have had problems with the Vivado_Init.tcl approach where Vivado was inconsistent in finding the additional boards. See this Digilent tutorial. I modified the mig,prj to use the correct 100T (as opposed to 35T) part. Also, the PMOD IP from vivado-library was originally targeted to the classic Arty board. To solve this, I opened the two PMOD in IP Packager and retargeted the IP submodules to Arty A7 100. I noticed that the OLEDRGB PMOD contained the xspi sources in the IP packaging. The system.hdf says as shown in the screenshot. It has the FPGA part selected without the board, as you noticed. With the OLEDrgb removed from the project and only kypd preset, the Microblaze project does execute over JTAG as expected. After adding OLEDrgb, the xspi sources are missing, so the project cannot compile. What option did you select to export the Vivado hardware to the SDK? I use File | Export | Hardware , and I include the bitstream. I select Local to Project. My clocking wizard configuration is the same as your screenshots. Tim Link to comment Share on other sites More sharing options...
Tim S. Posted August 8, 2019 Author Share Posted August 8, 2019 Hi @jpeyron, I discovered why the xspi sources are missing. Linux has a case-sensitive file system whereas Windows has a case-sensitive file system. The packaging of the PmodOLEDrgb has mixed folder name alphabet-case of the first character 'p' in the folders PmodOLEDrgb. This causes silent errors on Linux whereas I presume there would be no error on Windows. Best, Tim Link to comment Share on other sites More sharing options...
Tim S. Posted August 8, 2019 Author Share Posted August 8, 2019 Hi @jpeyron, I have a successful design with KYPD and OLEDrgb. The only bug is the ABCD column of the keypad indicates multiple key press and the correct key, at the same time. Thank you for your assistance. Best regards, Tim Link to comment Share on other sites More sharing options...
jpeyron Posted August 8, 2019 Share Posted August 8, 2019 Hi @Tim S., Glad to hear that altering the case of the folders to all be the same resolves the missing files in the SDK and the project runs. Please clarify the issue with the Pmod KPYD. Does the multiple key pressed message show every time that you press a button? best regards, Jon Link to comment Share on other sites More sharing options...
Tim S. Posted August 8, 2019 Author Share Posted August 8, 2019 Hi @jpeyron, The following solved the missing xspi. 1. Rename pmodOLEDrgb to PmodOLEDrgb under Vivado-library . 2. Add the PmodOLEDrgb IP to the block design. 3. Open the IP in IP Packager. 4. Under File Groups, rename the path driver/pmodOLEDrgb for the xspi to have capital 'P' for Pmod instead of lowercase, for each file. 4. Retarget the IP submodules to Arty A7 100. 5. Regenerate the IP module in the IP packager editor. 6. Close the subproject that opened for PmodOLEDrgb. 7. Remove the IP from the block design. 8. Delete the hardware description from project and file system in the SDK. 9 Re-add the PmodOLEDrgb to the block design, and then Regenerate top design bitstream. 10 Export hardware with bitstream to SDK. 11. Open in SDK from Vivado menu. Best, Tim Link to comment Share on other sites More sharing options...
Tim S. Posted August 8, 2019 Author Share Posted August 8, 2019 5 hours ago, Tim S. said: Hi @jpeyron, I discovered why the xspi sources are missing. Linux has a case-sensitive file system whereas Windows has a case-sensitive file system. The packaging of the PmodOLEDrgb has mixed folder name alphabet-case of the first character 'p' in the folders PmodOLEDrgb. This causes silent errors on Linux whereas I presume there would be no error on Windows. Best, Tim Just to make sure my explanation is thorough. The above has a typo. It should read: Linux has a case-sensitive file system whereas Windows has a case-insensitive file system. Link to comment Share on other sites More sharing options...
jpeyron Posted August 8, 2019 Share Posted August 8, 2019 Hi @Tim S., I have passed your suggestion to our content team. Thank you for sharing. best regards, Jon Link to comment Share on other sites More sharing options...
Tim S. Posted August 9, 2019 Author Share Posted August 9, 2019 Hi @jpeyron, Regarding your question on the KYPD: with the clock wizard set as discussed, the MIG UI clock is 86 MHz. If I use the KYPD driver as-is, the GPIO will poll at a frequency based on the CPU clock of the Microblaze. This caused some keys to not be read, or to be read as multiple keys pressed. Only about 1/2 of the keys would detect properly. To solve this, I added a micro sleep call to allow the GPIO of the KYPD columns to settle before polling the rows. With this modification, all of the keys detect correctly using the demo code. u16 KYPD_getKeyStates(PmodKYPD *InstancePtr) { u32 rows, cols; u16 keystate; u16 shift[4] = {0, 0, 0, 0}; // Test each column combination, this will help to detect when multiple keys // in the same row are pressed. for (cols = 0; cols < 16; cols++) { KYPD_setCols(InstancePtr, cols); usleep(5); rows = KYPD_getRows(InstancePtr); // Group bits from each individual row shift[0] = (shift[0] << 1) | (rows & 0x1); shift[1] = (shift[1] << 1) | (rows & 0x2) >> 1; shift[2] = (shift[2] << 1) | (rows & 0x4) >> 2; shift[3] = (shift[3] << 1) | (rows & 0x8) >> 3; } // Translate shift patterns for each row into button presses. keystate = 0; keystate |= KYPD_lookupShiftPattern(shift[0]); keystate |= KYPD_lookupShiftPattern(shift[1]) << 4; keystate |= KYPD_lookupShiftPattern(shift[2]) << 8; keystate |= KYPD_lookupShiftPattern(shift[3]) << 12; return keystate; } Thanks, Tim Link to comment Share on other sites More sharing options...
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Tim S.
I am trying to design a PL block design and SDK application to exercise the Pmod KYPD and Pmod OLEDrgb together with Vivado 2019.1 .
I downloaded the Vivado-library git release for Vivado 2019.1 .
In the SDK, I notice that driver PmodOLEDrgb.h is missing source files xspi.h and xspi_l.h . Where do these sources come from?
Tim S.
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