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Arty GPIO demo UART communication

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oops I never synced with github.... That is absolutely where you should look for it. The updated project should be up now.

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OK. Scrubbed my arty-master root and replaced with your new set. Also noticed that the board-files had changed after re-downloading and checking with winmerge, so plonked them into the relevant data folders under the xilinx software root. I then proceeded in an orderly manner to build the GPIO project first and all went well, up to and including das blinkenlights and uart pushbutton check.

Then I go for the next on the list, the XADC_Demo. All seems to go well, but I notice - next to open target - a hottie labelled something like IP core change, which I thought I'd better check out by clicking. Seems I might need to do some sort of upgrade but the IP is 'locked' and I am presented with this here popup - whim I'm not sure how to appropriately respond to. So I cancel it (top right redcross-dismisswise), with a view to halting until advised. But the IDE goes ahead anyway and does lots of stuff and ends up reporting

Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
| Tool Version : Vivado v.2015.4.2 (win64) Build 1494164 Fri Feb 26 04:18:56 MST 2016
| Date         : Wed May 18 23:12:51 2016
| Host         : kahontsi running 64-bit Service Pack 1  (build 7601)
| Command      : upgrade_ip
| Device       : xc7a35ticsg324-1L

Upgrade Log for IP 'xadc_wiz_0'

1. Summary

CAUTION (success, with warnings) in the upgrade of xadc_wiz_0 from xilinx.com:ip:xadc_wiz:3.0 (Rev. 7) to xilinx.com:ip:xadc_wiz:3.2

After upgrade, an IP may have parameter differences compared to the original customization. Please review the parameters within the IP customization GUI to ensure proper functionality.

2. Upgrade messages

WARNING: upgrade cannot add parameter WAVEFORM_TYPE with default value CONSTANT : a parameter called WAVEFORM_TYPE already exists in xadc_wiz_v3_2
WARNING: upgrade cannot add parameter STIMULUS_FREQ with default value 1.0 : a parameter called STIMULUS_FREQ already exists in xadc_wiz_v3_2
WARNING: upgrade cannot add parameter NUM_WAVE with default value 1 : a parameter called NUM_WAVE already exists in xadc_wiz_v3_2
WARNING: upgrade cannot add parameter EXTERNAL_MUXADDR_ENABLE with default value false : a parameter called EXTERNAL_MUXADDR_ENABLE already exists in xadc_wiz_v3_2
WARNING: upgrade cannot add parameter ENABLE_AXI4STREAM with default value false : a parameter called ENABLE_AXI4STREAM already exists in xadc_wiz_v3_2
WARNING: upgrade cannot add parameter FIFO_DEPTH with default value 7 : a parameter called FIFO_DEPTH already exists in xadc_wiz_v3_2
WARNING: there are only case-insensitive matches ENABLE_CONVST for parameter Enable_CONVST
WARNING: there are only case-insensitive matches ENABLE_CONVSTCLK for parameter Enable_CONVSTCLK
Renamed parameter INTERFACE_SELECTION (instead of Interface_Selection) to INTERFACE_SELECTION
Renamed parameter SIM_FILE_NAME (instead of Sim_File_Name) to SIM_FILE_NAME
Renamed parameter TIMING_MODE (instead of Timing_Mode) to TIMING_MODE

-- lots more of similar nature - about 400 lines - and ending up with:

Upgrade Log for IP 'xadc_wiz_0'

1. Summary

SUCCESS in the upgrade of xadc_wiz_0 (xilinx.com:ip:xadc_wiz:3.0) from (Rev. 4) to (Rev. 6)

The XADC_demo bitstream appeared to be generated regardless, so - living dangerously - I decided to prog the board regardless of the above, It all looked as if it worked, stepping up the leds as I twiddled a potentiometer.

So I'm not sure what happened there or whether it's 'safe' to proceed to the final BSD project in the triplet. But I might as well build and see what happens, so ...

During the project build, I get the heebie-jeebies with some intermittent chunks of orange text turning up:

WARNING: [BD 41-176] The physical port 'di' specified in the portmap, is not found on the block! 
WARNING: [BD 41-176] The physical port 'di' specified in the portmap, is not found on the block!
WARNING: [Vivado 12-3482] The generated wrapper file has already been imported into the project, the imported file is:

But at some point I inadvertently mouseclicked and lost my place in that message stream and couldn't find it again. There was some warning about a script having been created in viv 2013.1. Now I saw that before, about a month ago, and it seemed to be bad news. But never mind. The microblaze clock/rst bits appear to have moved to the new model, so that's something. I shall now attempt to generate the bitstream, despite those many bits of warningage.

BTW - in the wiki it states:

  • Vivado Design Suite 2015.4
    • You must use this version or the project will not generate
Presumably it'll also now be OK in 2016.1 and later though?

OK, So it got all the way to writing a bitstream entirely without further incident. Off to the sdk then.
Ah. Screeched to a grinding halt. The 'import projects' dialog in the sdk is yellow-bang-triangly headered with a warning that "Some projects cannot be imported because they already exist in the workspace". Perhaps this is not too surprising but neither vivado nor sdk is software written by me so I don't have any confidence about how to safely remove traces of former imports. Not that I can see anything obviously removable in any case. What's the 'official' way to delete old projects from the sdk's workspace without inadvertently destroying any potential metafile/folder integrity the sdk workspace management might be relying upon? I've long gotten out of the habit of just blithely deleting files or folders and finding out later that some 'system database' is thereby up-buggered. The SDK.log file was last updated on the 12th. And before you ask, I could not have 'just ignore[d] any warnings' and clicked 'finish' - as per wiki advice - since the finish button was disabled.
Almost there!
Edited by lemoutan
added last bit about unable to finish

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First off that upgrade message doesn't really involve you that much. Xilinx decided to improve their packaging of the IP's. They will work the same regardless but the new format may be more compliant with future tools and may be smaller in size. That change just happened and the transition is still happening. So who knows maybe it could cause problems. 

Those other warnings don't raise any flags with me since I don't believe any of those signals are used explicitly in the design. The BSD wiki is correct, the current project will only build with 15.4 now. Since so many IP's change, there isn't really a good way of making projects span multiple versions short of writing everything in HDL. To go to 2016.1, someone will need to go through the same process I went through to upgrade it to 15.4. Although we usually try to only keep our designs updated to the latest even release so that will most likely happen when 16.2 comes out.

To delete the work space, it is safe to exit SDK then delete the .sdk folder in \Arty\Projects\BSD\proj. (not the sdk folder located at Arty\Projects\BSD. ) I would do this, then export your hardware from vivado. File->export hardware. check "include bitstream" then launch SDK from vivado.  (local to folder) Launch SDK can be found in the file tab as well. 

Once in SDK you should see your hardware platform. Click file->new->application project. Name your project, then click next. Select hello world then click finish. 

Here is your basic program. This should be able to run and print out "hello world" just fine and where in the future you can create new projects from scratch!

To run the faux arduino bsd demo delete all the files located in the src folder and copy over everything from the src folder of the  Arty/projects/bsd/sdk/user into the src folder of your project. Your new generated BSP and hardware platform should be the same as the ones in the sdk folder so you don't really need these.  This code should run now and you can play around with digital I/O reads and writes. Just be sure to look at the digital.c library for how conventional xilinx projects do GPIO. I'm sure I missed a step so we will see how far you get.

The programming flow is click xilinx tools->program fpga, then click into your main C file and click run on system debugger. Good luck! I'm sure I missed a step somewhere.

Edited by sLowe

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9 hours ago, sLowe said:

To go to 2016.1, someone will need to go through the same process I went through to upgrade it to 15.4. Although we usually try to only keep our designs updated to the latest even release so that will most likely happen when 16.2 comes out.

That comes across to me (as someone with no investment in the IDE) as pretty much having to come up with a new IDE every time some new hardware is released. I'm imagining that vivado, whilst possibly an improvement over the previous ISE with respect to this kind of updatability/scalability, is still seriously short of being future-proof. However, I guess it's easy to criticise from the sidelines. Anyway, that's by the way.

As for the sdk issues, I'm a bit confused by your solution above. I was following the project flow as described in the wiki writeup where I'd done 4.1 and 4.2 (thus omitting all of 5, which was ok as I already had a workspace rooted at /xilinx/sdkws2015.4/), 6.1, 6.2 and got stuck at 6.3. Like I said, I'd completely scrubbed the arty-master project folder root (with child GPIO, XADC_Demo and BSD projects) and so don't understand how anything there - perforce created after anything in that workspace - could possibly 'contaminate' the sdk's workspace management. So how can removal of the (in my case) /xilinx/Arty-master/Projects/BSD/proj/bsd.sdk (I presume you mean bsd.sdk when you say 'delete the .sdk folder') mollify the SDK? It's surely just going to get recreated again at vivado's 'Export SDK' time to be there ready for the sdk to use?

Ah - maybe I see what you're getting at with your instruction to create a new app via the 'hello world' route rather than follow the aforementioned 6.2 and 6.3 instructs (i.e. import existing). BTW I'm just writing this as a 'real time' narrative here. OK - I can see how that might work (though I'd rather properly excoriate the old stuff from under sdkws2015.4 and re-invent history - but perhaps that interferes with or upsets webtalk?). Tum-ti-tum ... I'll call it bsd1, it's using OS Platform standalone, Hardware Platform system_wrapper_hw_platform_0, processor microblaze_0, Target softlang C (32bit) and board support package 'create new bsd1_bsp. Umm, do I really want to do that? Where's the 'hello world' app? Use existing is disabled, so it's my only choice. Oh well ... Finish ... Stuff happens. Stops. There's a bsd1 branch as well as a bsd1_bsp. 

I can't see any "hello world" being printed anywhere and seem unable to debug this at source level. I'm getting assembly language here. Whilst my previous experience goes back to programming the old 6502 I'm not sure I want to be doing that any more! Maybe I'll just skip all this and try to do your BSD thing ...

Oh good grief it's just dawned on me - the SDK workspace originally set up last month is quite irrelevant here isn't it? Of course there's nothing there to remove. It's all being done under that bsd.sdk folder. But in that case why on earth - last time - did the sdk 'think' there was an older project with the same name 'in the way'? I'd completely scrubbed that entire arty-master tree! I don't understand what's going on here. The sdk workspace idea is past its sell-by date?

Never mind. Let's do what you say and replace all that helloworld.c stuff (under /xilinx/Arty-master/Projects/BSD/proj/bsd.sdk/bsd1/src) with stuff from /xilinx/Arty-master/Projects/BSD/sdk/bsd/src (I'm guessing a bit here since there's no  Arty[-master]/projects/bsd/sdk/user as such). These sources are a core folder and three files - lscript.ld, sketch.[ch] - which indeed look like arduino blinkiness. Here's hoping I can debug at source level ...

OK, I seem to be in the middle of some actual C here and have just stepped over a "print("Starting...\n\r");" but in the myriad of panes and tabs I cannot for the life of me see any of them showing a "Starting...". Has that happened exclusively on the UART? I thought the uart - in the sdk - could be rerouted to some sdk console (but perhaps that doesn't happen by default). ANYway ..., let's step into setup. OK, so far so good. Now for (tada ...) loop(). Stepover the digitalWrite(PIN_LED0, HIGH); and a led on the board lights. Well, whaddya know? ... And I can even step into digitalWrite etc.

I'm still not sure about the 'workflow' and the 'what's going on' in these IDEs y'know. I'm going to have to digest all this.

Gazes at blinking led ...

Thanks again.



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No problem! I think you are over the biggest hump and will slowly become familiar with the tools. To see the UART I usually use a third party serial program. I use real term but a ton of people seem to like tera term. You can see it in sdk if you select run as->launch on hardware (GDB) then click the run menu-> run configurations. Select GDB, then go to the STDIO Connection then check "Connect STIO to Console" then select the serial port and Baud rate which I believe is 9600 for this application.  This will put you UART in the console window at the bottom of sdk.

Glad to help!

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On 4/5/2016 at 1:15 PM, JColvin said:

Hi ColoradoAnalog,

Thanks for posting what you found! I'll make sure the demo project page gets updated appropriately.


Hi JColvin,

Are and where are the latest demo projects updates located in Digilent?  I have Speedway Sept 2015 version 1015.2r1 for the Arty board and would like to have access to the latest version.



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