Interface BRAM through ethernet (RJ45) in Xilinx vivado & SDK with Zynq Ultrascale+ ZCU102

[bharaini]

Hi,

I'm a beginner in this topic, is there any reference links or tutorials that I could refer to start off in transmitting and receiving data in Block RAM through ethernet port (RJ45) in Xilinx Vivado and SDK. The board that I will be using is Zynq Ultrascale+ ZCU102.

I want to connect the data in Block ram of Zync Ultrascale+ ZCU102 through ethernet RJ45. I would like to get reference links, tutorials regarding how to start about this in Xilinx Vivado and SDK. Details about this would help me go forward.

[zygot]

There just aren't a lot of ZYNQ boards with an Ethernet PHY connected to the PL out there. The Ethernet on your board is connected to the PS and goes through the ARM MAC. If you had a ZYNQ board with an Ethernet PS connected to the PS and a second Ethernet PHY connected to the PL you could connect the second Ethernet PHY to the second ARM MAC and use it just like the first one. If you wanted to bypass the ARM MAC you could use BRAM and logic in your PL to create a connection between this Ethernet PHY and the ARM processors.

It's not clear what your objectives are but from what you've said it is clear that you aren't ready to start on your project. The best place to find the information that you want is through the Xilinx Documentation Navigator. You have a lot of material to get through, just on the ZYNQ device that you are using before even trying to do development work.