Paul99 Posted June 24, 2019 Share Posted June 24, 2019 Hi, I need to simulate the jtag interface to a ZYNQ board we are developing. Do you have an IBIS model for the jtag-hs3 programer? If not can you give me details of the output circuit and what type of driver is being used. thanks Paul Link to comment Share on other sites More sharing options...
jpeyron Posted June 25, 2019 Share Posted June 25, 2019 Hi @Paul99, We currently do not have an IBIS Model for the JTAG-HS3. I talked with one of our design engineers and they responded that we could make a block diagram to show you which I/O buffers that we are using and how those are connected to the physical pads. That should allow you to obtain IBIS models for the I/O buffers from their respective manufacturers and then use them in simulation. Would this meet your needs? best regards, Jon Link to comment Share on other sites More sharing options...
Paul99 Posted June 26, 2019 Author Share Posted June 26, 2019 That would be great. What would also help is if he could let me know what type of gate is driving the pin. HCT,HC,LVCMOS etc thanks for your help Paul Link to comment Share on other sites More sharing options...
jpeyron Posted June 28, 2019 Share Posted June 28, 2019 Hi @Paul99, We are working on getting you the information. It may be a little bit of time do to bandwidth constraints. best regards, Jon Link to comment Share on other sites More sharing options...
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Paul99
Hi,
I need to simulate the jtag interface to a ZYNQ board we are developing.
Do you have an IBIS model for the jtag-hs3 programer?
If not can you give me details of the output circuit and what type of driver is being used.
thanks
Paul
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